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IWR1443BOOST: Configuration of chirp

Part Number: IWR1443BOOST

Dear Engineer,

I have a question about the chirp configuration, as shown in the figure below. The marked part indicates that there will be a "nonlinear" period in the early stage of the linear increase of chirp signal frequency. How long will it last?

  • Hello Kelong, 

    This depends on a lot of factors like the Synthesizer PLL ramp-up settling time, HPF step response settling, IF/DFE LPF settling time. Based on these an a valid ADC start time value is chosen in order to surpass this initial non-linearity. 

    You can refer to section 5.2 in the below linked application note to understand more about this : 

    Programming Chirp Parameters in TI Radar Devices (Rev. A) 

    The Ramp timing calculator in mmWave Studio can help you estimate a reasonable ADC start time based on your configuration. 

    Regards,

    Ishita