Hi,
We are doing signal integrity simulations for SMBus between controller and TMP102AQDRLRQ1. We are facing certain non-monotonic glitches in the SCL lines.
Kindly confirm whether these non-monotonic glitches is real matter of concern.
However, as per the I2C standard, it is specified that for fast mode there exists an internal filter to reject spikes (<50ns) and hysteresis (0.05Vdd) on the I2C lines. If so, we believe that monotonicity may not be a problem.
In TMP102-Q1 datasheet, we did not find any information regarding input hysteresis.
We want to confirm that whether this particular device has inbuilt filters to reject spikes of less than 50ns and has an input hysteresis of 0.05Vdd on I2C lines?
Regards
Sreelekshmi.
