Hi supporter;
TI suggests use clock buffer when there are more than 2 cascade in swra574b.
what if we just use microstrip line or stripline and keep the equal length?
Is there any concern about drive capability or any other reason?
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Hi supporter;
TI suggests use clock buffer when there are more than 2 cascade in swra574b.
what if we just use microstrip line or stripline and keep the equal length?
Is there any concern about drive capability or any other reason?
Hi,
The drive strength level requirement is listed in the datasheet. For 2 chip cascade you dont need a buffer as the OSC_CLK_OUT from primary device can be fed to the only secondary device, however, for more than 2 cascade device(s) topology if you can maintain the spec requirement then it should be OK.
Regards