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AWR6843ISK: Can DMA and core access different peripherals at the same time?

Part Number: AWR6843ISK
Other Parts Discussed in Thread: IWR6843, , AWR6843

Hi team,

Regarding the SWRU520E doc of TRM and SWRA627 doc of  IWR6843 Bootloader Flow, the customer has the following questions:

1) According to the system interconnect diagram on page 256 of 520e document and the IWR6843 Interconnect diagram in page 2 of RA627 document: 

Is there only one way to connect the PCR-2 bridge with respect to the two bus crossbar modules, SCR_64bit and PCR_32bit? That is, the DMA is connected to the PCR separately. This allows the core to access one of the interface modules on the PCR.

For example, when configuring the UART, the DMA can simultaneously transfer to the register space of other interface modules. When the DMA is configuring the address space of other interfaces (I2C) on the Core, it can transfer data to Mibspi's SRAM simultaneously, enabling drivers for both IPs on the code side at the same time? If so, does the DMA need to introduce a cable from the DMA to the lower interconnect in the RA627 documentation? 

2) On page 32 of SPRUIV5B document for AWR294x: 

The master on SCRP indicates that there are two masters of R5F and two masters from SCRM, as well as the main ports of the DSS and BSS subsystems. Will there be a conflict accessing which slave port of the interface PCR module? Or can the interface SPIA/B be accessed individually by multiple subsystems at the same time? But the SCRP to MSS PCR in the figure above draws only one line. 

Could you help check this case? Thanks.

Best Regards,

Cherry

  • Hi,

    May I know is there any updates?

    Best,

    Cherry

  • Hi Cherry,

    Apologies, this thread seems to have gotten lost in our system. We will be looking into this and will have some initial response on Tuesday.

    To clarify, is your question asking if we can access two peripherals (such as UART and i2c) at the same time from the DMA on the AWR6843ISK?

    Thanks,

    Angie

  • Hi, Angie

    I used to post this question and translated by Cherry.  Thanks Cherry, I just clear the buffer of my safari and I can use E2E, as well.

    Here, I would like to specify what problem I really encountered during the design on AWR6843ISK.

    1. Whether there are two master port on PCR?

    From CBA (TI's Common Bus Architecture doc), I am informed that both SCR and PCR could conduct the functions of  arbitration and multi master to multi slave interconnect. 

    But, according to the system interconnect diagram on page 256 of 520e document:

    It is noticeable that PCR has two possible ports that could be used as master ports for the use of interconnecting.

    One is somehow for sure that is the bridge from SCR to PCR that could be used by CPU to access interface and IP registers on PCR, as a PCR master.

    The other one is what makes me confused! That is the wire from DMA to PCR ! Since DMA  on Section 8 is illustrated of two port as porta/ portb, which could be related with two master provided on DMA, as the corresponding description below: but it is also indexed that porta might be deleted on AWR16xx.

    In summary of this question1, I would like to know whether there are two master port on PCR to enable interconnect functionality?

    2. Therefore, I would like to  know whether DMA on AWR6843 is just of only one portb to SCR and one configuration port from PCR? but porta does not exist anymore.

    In summary of this question2, whether DMA is of only portb  and a configuration port, no longer a porta on AWR6843? 

    Application Scenario:

    To conclude, the reason why I want to figure out this information that not clear on TRM document is that my design would enable interfaces on PCR simultaneously. For instance, CPU writes to I2C registers and DMA writes or read to MIBSPI simultaneously. this could only be achieved only if there is a interconnect with two master port on PCR, supposed that AWR6843 is supported. Otherwise, I need to change to use AM264x (it is clear that an interconnect is supported on AM264x architecture from TRM doc) to bulit a cascade of diagital system and radio front system to enable this interconnect. 

  • Hi Lyalin,

    Thank you for the additional details. I am looking into this and should be able to provide input by tomorrow. Thank you for your patience.

    Best Regards,
    Kevin

  • Hi Kevin,

    Thanks for your consideration and research. Hope that there would be any further progress on these two problems soon.

    Best Regards

    Lyalin

  • Hi Lyalin,

    My apologies for the delay. I am doing a bit deeper investigation on this. I greatly appreciate your patience. I will provide update no later than Monday.

    Best Regards,

    Kevin

  • Hi Lyalin,


    PCR-2 bridge is a slave port for all the masters. From hardware side only one master can access the peripheral at a time. No simultaneous transfer is supported from HW.

    On 294x as well only one master can access an PCR bridge. Since SPIA/SPIB falls under PCR_A only one master can access them at a time.

    Best Regards,

    Kevin

  • Hi Kevin,

    Thanks for your information. This does a great help for my further project.

    Best Regards

    Lyalin

  • Hi Lyalin,

    I'm glad it helped! Thank you, I will be closing this thread. 

    Best Regards,

    Kevin