TIDA-010249: How to implement DC Coupling with external DAC

Hello Jun,

In case of DC coupling of IEPE sensors, and because the DC bias of each individual sensor can vary within a range, there should be calibration of the VDAC signal with the given sensor either once when installing the sensor, or once each power up of the system if you want to include DC bias drift as well. for this calibration to be done the sensor should not have any vibration input (the environment noise still exists but it is not affecting the calibration). in the calibration phase, the VDAC output is changing in successive approximation manner (MSB to LSB), in the search for the least ADC reading of the whole chain. The calibration process should return the VDAC code that result in the lowest reading, which in that case the residual offset. digital processing can remove that offset later on to report accurate measurement of low frequencies.
This calibration process is actually implemented in the TIDA-010249-Software available for download (although not documented in the user guide). To see it in action, configure the ch4 on the board in DC mode, attach the IEPE sensor, and make sure it is not subject to vibration, then run the following menu command : Configuration/ DAC settings. a new window will open as shown below.

Click on the "Calibrate" button to start the calibration process. 15 iterations will be carried out, with DAC value changing and the ADC readings are listed in the table bottom of the window. the optimal DAC value found through the calibration is shown in the DAC DATA cell on the top left. the DAC value is automatically set to this value. [Note the screen capture shown are just the simulation mode of the SW, and no board is present].

if isolating the vibration is not possible for calibration, and DC coupling is still needed, a different signal chain is required, where both DC and AC are scaled down, and the ADC is converting both, and the AC is separated later in digital domain. this is resulting in lower dynamic range though and might not get the same SNR performance.

A third option for continuous DC monitoring and subtraction is to have a servo loop running in parallel to the main signal chain, including sharp low pass filter, and a dedicated high resolution ADC, the loop keeps reading the DC and subtracting it from the main path through the DAC technique as in the first method. this method doesn't need separate calibration step, but it requires more hardware and of course higher cost.

Regarding this question:

"The other question is, in DC coupling signal paths, should the VCOM pin of THS4551 connect to VCOM (ADD/2) , or connect to VDAC of external DAC8050?  How about the negative input of OPA2320 (component U5AD)?"

VDAC is only connected at one point which is the bottom of the resistor divider at the input. all other VCOM points need to connect to the VDD/2.

Regards,

Ahmed

Thanks Ahmed for your professional and helpful three options. It really figures me out from the fuzzy situations in DC Coupling chain.

I made a circuit simulation with DC coupling chain, and calibrated the VDAC value manually as your option one. With proper value, the differential output of THS4551 was good, that means Vp and Vn have almost the same DC basis.

I understand this could result in lower dynamic range as you said in option 2. But it really could sample the Input signal in DC chain, and amplify will not go into saturation. Lower dynamic range was acceptable. And further, If the range of input signal was fixed, I can calibrate VADC again, so as to obtain the best performance in this range.

At here, sorry I have another question is whether the accuracy of VDAC will affect the last value sampled by ADS127L01? I notice that in TIDA-010249, DAC80501 was selected, which is a 16 bit D/A. Do we need to select a 24 bit DA, so as to match the resolution of ADS127L01?

Thanks and have a nice day, 

Hi Liu,

The accuracy of the VDAC is affecting the residual offset (DC value) that you get after calibration. However, your signal chain has already intrinsic offset, and the 24b ADC has noise limitation which also limits the offset you can get. on top, on top DACs are expensive, the cheapest 24b DAC is priced higher than $20. It is no use to spend money on getting fine offset, which is lower than the native analog offset and noise.

actually if you can get reasonable residual offset with 14b DAC, you should go for it to save cost. 

Cheers!

Hi Ahmed, thanks for your sharing. I agree with your performance and price balance. Since I am looking for a acceptable DC chain solution, based on the reference design.

It completely resolved my issue. Thanks again.

Thanks Liu,
Kindly klick resolved on the this comment. as new entries to the same thread will open it again

Regards,

Ahmed