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TDC1000: MCU Not Able to Communicate with TI TCD Device over SPI

Lovi Jain
Prodigy 10 points

Part Number: TDC1000
Other Parts Discussed in Thread: MSPM0G3107, , ,

Hello TI Team,

I am facing an issue with SPI communication between my MCU and a TI TCD device.

Hardware Details:

  • MCU: MSPM0G3107

  • Device: TDC1000-Q1

  • Supply Voltage: 12V

  • Common ground between MCU and TDC1000

SPI Configuration:

  • MCU configured as SPI Master, TDC1000 as Slave

  • SPI Mode & SPI Clock Frequency: Screenshot is attached for reference

  • Data width: 8 bits

  • CS is active low and controlled via MCU GPIO

  • EN is set high and RESET is toggled low→high before SPI access.

    For SPI read, CS is pulled low, register address is sent, and dummy bytes (0x00) are clocked to read data.

Clock Configuration:

  • Attached MCU clock tree configuration for reference.

Issue Observed:

  • MCU is not able to communicate with the TDC1000 over SPI.

  • Register read/write is not working as expected

  • MCU is not able to read valid data from the TCD device

Attachments:

SPI configuration details:

image.png

image.png

MCU clock tree configuration :

image.png

MCU–TDC1000 SPI schematic :

image.pngimage.png

Could you please confirm whether this SPI sequence and reset/enable timing are correct for TDC1000 as per the datasheet?

Thank you for your support.

Regards,
Lovi Jain

  • 0
    TI__Genius 15535 points

    Hi Lovi,

    Thank you for posting to the Sensors forum!

    Are you able to share captures of the digital logic waveform as you attempt SPI communication? This will help determine if there is something potentially wrong with the signal.

    Regarding your SPI clock signal, is the default of the SCK pin kept high or low when not communicating?

    Best,

    ~Alicia

  • 0 in reply to Alicia Rosenberger
    Prodigy 10 points

    Hi Alicia,

    Thank you for your response.

    Please find the attached Screenshots of Logic Analyser Captures for your reference. The captures include CS, SCLK, MOSI, and MISO signals during the SPI communication attempt. SPI register read is performed periodically every 250 ms from the main loop.

    Kindly review the attached waveforms and let me know if you observe any issue with the SPI timing, clock polarity/phase, or signal behavior as per the TDC1000 SPI requirements.

    Please let me know if any additional information or specific capture is required from my side.

    Best regards,
    Lovi Jain

  • 0 in reply to Lovi Jain
    TI__Genius 15535 points

    Hi Lovi,

    Just to be sure, VIO and VDD are powered as you are communicating correct? The EVM schematic in the user's guide linked below should be a good reference for ensuring that your schematic is good.

    TDC1000-C2000EVM User’s Guide - Section 8 Schematic

    Based on your signal, it looks like for a single transfer, the clock stops after 8-bits. Could you try increasing the frame size to 16-bits to see if that helps? 

    I have included an example of what a read of register 0x03 from the TDC1000-C2000EVM looks like below:

    The settings that the EVM + GUI use for clock polarity is CPOL = 0 (clock is low when active) and clock phase is CPHA = 0 (data is valid on clock leading edge).

    Best,

    ~Alicia

  • 0 in reply to Alicia Rosenberger
    Prodigy 10 points

    Hi Alicia,

    I am not able to find TDC Chip select pin in EVM board MCU. Also I have checked all other configuration that u have suggested but still showing same behaviour.

    Can u please provide Pin details for SPI lines and TDC reset and enable lines?

    Regards,

    Lovi

  • 0 in reply to Lovi Jain
    TI__Genius 15535 points

    Hi Lovi,

    I've highlighted where on the EVM the SPI lines are on the image below:

    • The yellow box is the connection to the TDC chip select pin (R16).
    • The red box is MISO (R29)
    • The blue box is MOSI (R47)
    • The blue box is SCLK (R43)
    • The yellow circle is TDC EN (TP12)
    • The green circle is TDC reset (R32)

    Best,

    ~Alicia