LDC1312EVM: No continuous conversion

Hi Mike,

The only bits you need to set are bits 15:13 in the MUX_CONFIG register (address 0x1B). As long as the device is in active mode, it will continuously convert. You do not need to read any register to trigger the next conversion. Reading the STATUS register will clear any error status bits and will de-assert INTB.

I noticed that you have your FREF divider set to 266. What frequency is your reference clock? The conversion time is dependent upon the frequency of the reference clock after the FREF divider. I'm not sure how quickly you are reading the registers, but it's possible that the next conversion has not finished yet by the time of you next STATUS read.

Best Regards,

Howdy Kristin,

I thought it was 13 MHz, but I measured it on the scope last night and found it was 40 MHz.  I'm trying to measure a thing which has a self resonance around 40 kHz.  I was trying to make 100kHz the max return value. (which would be 133, but I was messing around to see if I could change things - it didn't)

I'm definitely confused about how the LDC works.  It seems to put out a pulse at around 2 MHz no matter what I set the registers to, but the length of time the pulse runs changes.  Some how I got it locked up so that either channel 0 or channel 1 would be continuously on and the other channel never fired.  I suspect I'm using the EVM interface incorrectly - I'm talking to it directly via a C program on a Linux box. 

When I unplug the EVM and plug it back in again, the default is to run both channels at 26.2 msec and at half power.  I have been sending a reset command before I do anything, but I think I will just dump all the registers and see what the boot up settings are, and then modify them one at a time. 

The thing I'm measuring has a DC resistance of around 2K, so it should be in range of what the LDC can work with.  I've read the data sheet and the LDC sensor design doc, but I don't understand how it works.  Is there some other document that describes the core (as drawn in the functional block diagram) in more detail?

I just dumped the registers and now I'm super confused. Registers 20 and 21 (clock dividers) specifically say in the manual "b0000 reserved, do not use". Yet the value of these registers is set to zero. And the EVM reads out just fine with no lock ups. What does the clock divider actually do?

Hi Mike,

Registers 0x20 and 0x21 are the drive current settings for channels 2 and 3, which are only available on the LDC1314. The clock dividers for the LDC1312 are registers 0x14 and 0x15.

In general, the LDC drives an LC tank at its resonant frequency. The LDC measures the frequency of the LC tank for a certain period of time and compares it to the frequency of the reference clock, FREF. The LDC digital output codes are a ratio of the measured LC tank frequency to FREF. The maximum FREF that the LDC can accept is 40MHz. The only reason to use the clock dividers is if the only clock frequency available for FREF is greater than 40MHz. Otherwise, the resolution will be maximized when FREF is maximized. In your case, using the 40MHz external oscillator with the clock dividers set to 1 is the best option.

If you would like some example code for communicating with the MSP430 on the LDC1312EVM, we have some available here: e2e.ti.com/.../295036

Also note that you should not be measuring the DC resistance, you should be measuring the AC resistance at the resonant frequency of your sensor. This app note should help for measuring the Rp: www.ti.com/.../snoa936.pdf

Section 7 of the LDC1312 datasheet describes the functional block diagram in more detail. If you have any specific questions about this section or LDC Sensor Design I'd be happy to answer them.

Best Regards,