AWR1243: XA1243FPBGABL

Marco Brignoli

Part Number: AWR1243

HI,

I'm working with two XA1243FPBGABL chip connected in cascade configuration.

I have a problem during the boot of the system, i try to program the chip master in Functional SPI mode but the SPI_HOST_INTR signal after going on high level after the power on, remains always high.

The path of the MOSI is correct in according with the SPI_CLK and SPI_CS.

the control signal that i used, connected to the host, are : SPI_CS, SPI_CLK, MOSI_1, MISO_1, SPI_HOST_INTR_1, NRESET, NERROR_OUT

The SOP configuration is : SOP2=0, SOP1=0, SOP0=1

I wanted to know what could be the cause of the problem (SPI_HOST_INTR signal remains high) and if the control signals used are correct or if someone is missing for the configuration in Functional SPI mode.

Thanks

Best Regards

over 5 years ago

0 Cesar over 5 years ago

TI__Guru**** 150064 points

Hi,

Our cascade team will review your request and will get back to you

thank you

cesar

0 Randy Rosales over 5 years ago in reply to Cesar

TI__Mastermind 18500 points

Hi Marco,

Can you please verify what your power on reset sequence looks like? I would need to check the 40MHz clock, reset and power supply sequencing.

Are you referencing the sequence provided in the AWR1243 datasheet (Figure 5-2. Device Wake-up Sequence)? Please also reference the AWR1243 Bootloader Flow application note here: https://www.ti.com/lit/an/swra561b/swra561b.pdf

Do you have a QSPI flash memory attached to the devices?

Thank you,

-Randy

Sensors

Sensors forum

AWR1243: XA1243FPBGABL