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PGA450-Q1: OSC_SYNC_CTRL and CLK_SEL - proper init sequence

Part Number: PGA450-Q1
Other Parts Discussed in Thread: PGA450Q1EVM

Are there any recommendations for OSC_SYNC_CTRL vs CLK_SEL setup scenario?
I've experienced some issues when OSC_SYNC_CTRL had other than programmed value - I noted the difference between what I wanted to set in OSC_SYNC_CTRL and what I've read from that register usign GUI in RESET. Only power off and reload firmware again fixed that.

I've seen it when running from development-ram - I'm not sure if it happens when running from OTP just because I did not have a possibility to do so many tests on OTP however I'm experiencing some rare issues when it leads me to the conclusion that behaviour may be similar.

What are restrictions - recomendations for setting up OSC_SYNC_CTRL? 
I don't want to shift clock frequency - I'd like to use:

OSC_SYNC_CTRL=0x60;
CLK_SEL = 0x00; //internal clock

In mentioned failure situations I've read OSC_SYNC_CTRL to be 0x40 instead of 0x60.

  • Hello,

    To clarify your question: you would like to use the internal clock, with no frequency shift and no clock synchronization, but when you read the register in RESET mode after having programmed the OS bits, you see OS<5:0> is 0? 

    Do you have a PGA450Q1EVM?

    Regards,

    Gabriel

  • Hello Gabriel

    Exactly, I want just internal oscillator with no shift and sync.

    Yes, I've got PGA450Q1EVM.

    Just to be clear - I can not easily repeat such situation but when it happened it was permanent 
    until the power off. It looks like it was locked somehow - resetting or reloading dev-ram firmware 
    did not change the situation. Only after power off and next dev-ram load it was back to normal.

    Regards

    Andrzej

  • Hi Andrzej,

    There are steps in the user guide for evaluating the EVM over SPI. When you follow these steps, reading and setting the desired registers through the GUI in RESET, then going into active mode, then going back into RESET and reading the register values. Do you see any unexpected behavior or errors? If you follow similar steps, but writing and reading the registers one at a time in the DEVRAM tab in the GUI, do you see the issue?

    Regards,

    Gabriel