TMP708-Q1: TMP708-Q1 behavior is not correct at power cycling test in high temp

Hi Alpha,

Yes I was able to see your attached files. I think everything looks right in your schematic. One quick change, can you try using an 11.5kΩ resistor and checking the result?

Can you explain to me step 5 in your procedure? Why are you disconnecting the power here? 

You also mentioned that you verified with a second device. What was the result?

Jalen

1.step 5 is trying to verify the power cycling test. Repeating power on and off to see if every time the device booted up successfully.

2.2nd device not verify it yet. We will process it asap.

3.Why you proposed the 11.5Kohm?

4.Do you know the diff from my new ppt file. The /OT (STBY_EN) behavior is strange between pass and fail.comparison.pptx

2nd/3rd devices had the same symptom, 

=> It looks like when power loss suddenly, the OT pin is pull-low for a while. 

      Before power loss, OT was keeping high. Can we assume OTP was not touched while power is loss?

      And it resume to normal after temperature return to normal temperature.

CY,

Yes there seems to be some dependency on the power cycling at higher temperature. Do you get the same result with OT if there is no power cycling performed at high temp? I want to know the output if step 5 is removed from your test procedure.

Jalen

Alpha,

Yes, I can see the difference in your ppt file between STBY_EN toggling low then high in the pass case, but when it fails it remains low after power is connected.

I recommended a 11.5kΩ resistor because it may provide a better controlled trip point. As shown in your calculations we want a set resistor in close to 11.643kΩ. I would like to see the function with this resistor value as another debug method. 

Jalen

Hi Jalen,

(1)Do you have any idea unplugged power cable why the pass case the STBY_EN signal kept following the RTC_3V3 rail shape? And why the failed case kept low 0V immediately? 

(2)It still have a possibility that the chip really triggered by the actual high temp at 105 degree.We measured the IC surface by thermal couple. Can you tell the more right setup to measure the trip temperature?

(3)11.5K result will be updated later.

Alpha

If no power recycle, OT wasn't pulled low in high temperature. We check it for an hour.

After changing from 11.8k to 11.5k , the result is the same.  This is performed under 10ms monetary drop.

We have a IC next to TMP708, the temperature can be read from that. It happens from ~92degree. (the temperance reach to ~99degree eventually)

The next picture is to remove power supply when it fails, OT is pulled low until VRTC_3v3 drop to ~1.45V

Regards,

CY

Alpha,

You can override the SET pin with a voltage. At 105C the TMP708-Q1 should supply 46uA to the set resistor. If this value is 11.643 as in your calculations then the threshold voltage should be 535 mV. This is a test that can be performed at room temperature to isolate the issue and see if the trip threshold is correct. 

Jalen

Hi Jalen,

 It is clear the TMP308-Q1 having issue at high temp power cycling. Can you suggest another part which is pin2pin to TMP308-Q1?

thanks.

Alpha

Hi Jalen,

(1) I will verify the trip voltage at SET pin tomorrow.

(2)Do you think I can try the TMP309-Q1?

(3)Any others part to suggest?

(4)Do you have idea possible cause to trigger the trip when power loss?

thanks.

Alpha

Alpha,

As you mentioned it does seem that there is some effect on the output when the power is cycled at high temperature. There may be some power cycling or brown out condition being met. Unfortunately, we do not have any other pin2pin parts as the TMP708-Q1. I can recommend the TMP390-Q1 as an alternative temperature switch. 

Jalen