Hi,
How should the AFE5818EVM clock be setup if I want to run 4 development card from the same clock to get the card synchronized?
Is there a suitable clock buffer to be used for clock distribution of one clock to four AFE5818EVM cards with SMA connected at the SMA J35?
Hi Praveen,
I first try to describe what I trying to accomplice. I have a mems sensor with 64 elements in it. I will run this mems sensor at a 200kHz frequency. In first setup I will only send out ultra sound and record the echo with RX boards on all channels. Later on I will implement RX beam forming into the FPGA.
The setup is that I will use an FPGA development board(ARRIA 10) with 80 LVDS channels, 4pcs AFE5818EVM board, an tx board to drive the mems and with RX switch. One connection board connecting 4 afe5818evm cards to the FPGA and tx card.
The idea is to record the data from the 4 afe5818evm cards with the fpga card. I believe that it is important that the RX cards is running on the same frequency and samples the data at the same time.
FPGA development board. 
Best regards
Jens Mellberg
