AWR1243: Cascaded reference design I2C to SPI bridge

Victor Chan2

Part Number: AWR1243
Other Parts Discussed in Thread: DS90UB960-Q1

Hi, I've taken a look at the Radar SDK bsputils_ub960.c file and see that there are comments that refer to an I2C to SPI bridge with associated address settings. Could you let me know what device that is? We have been developing a board with an I2C-SPI bridge and would like to know if it is the same device, or at least a similar one. We could then possibly use much of the SDK code. Thanks - Victor

over 5 years ago

0 Vaibhav Mahimkar over 5 years ago

TI__Mastermind 23570 points

Hello,

Glad to know you are looking into board development with AWR1243 devices. In order to to better answer your question can you please point out under which module/dire of SDK are your referencing the mentioned C file?

Thank you,
Vaibhav

0 Victor Chan2 over 5 years ago in reply to Vaibhav Mahimkar

Prodigy 160 points

It is in gUb960Cfg_D3AR1243 section. I believe if you search on text "I2C-SPI bridge I2C Address" it will get you to the section. I'm actually more interested in the actual IC that is on the cascade board that D3 is developing. Is it an NXP SC18IS602B? Thanks -

0 Randy Rosales over 5 years ago in reply to Victor Chan2

TI__Genius 17200 points

Hi Victor,

I believe this refers to the DS90UB960 FPD Link bridge: www.ti.com/.../DS90UB960-Q1. The DS90UB960-Q1 are not simple I2C-SPI bridges, but rather are part of an automotive chassis high-speed data and control PHY chip-set.

Please let me know if that answers your questions on this topic.

0 Victor Chan2 over 5 years ago in reply to Randy Rosales

Prodigy 160 points

No, this is not what I am asking about. The DS90UB960 has registers where I2C device aliases are configured. These aliases reflect devices that are connected to the serializer on the other end of the FPD link. In the Radar SDK code, it appears that there is a I2C to SPI bridge IC connected to the serializer that has address 0x50, and the corresponding alias for that device is defined to be "D3RIB_PORT_0_IOEXP_ADDR << 1U". Here is an excerpt from the code:

{0x5E, 0x50, UB960_REG_DELAY_TIME}, /*I2C-SPI bridge I2C Address*/
{0x66, (D3_AR1243_PORT_0_SENSOR_ADDR << 1U), UB960_REG_DELAY_TIME}, /*Bridge alias address (Used to be 0x7c)*/

Thus I assume that there is an I2C to SPI bridge device on the D3 AWR1243 cascade board. It is needed because the back channel of the FPD link only supports I2C and the AWR configuration interface is SPI.

If indeed the I2C to SPI bridge is the NXP SC18IS602B then it will greatly simplify the scope of our work to interface to my cascaded AWR1243 board. I am asking to verify that is device is on the D3 board. If I can obtain a copy of the schematic I can verify for myself.

Thank you.