AWR1243: Is OSC_CLK_OUT enabled/disabled by cascading cfg?

Adam Yao94020

Part Number: AWR1243

Hi champion,
In 1243P cascading mode, is OSC_CLK_OUT (the 40Mhz clock) also enabled/disabled by this CASCADING_CFG setting?

Thanks,
Adam

over 5 years ago

0 Jitendra Gupta over 5 years ago

TI__Guru 68170 points

Yes, it does enable OSC_CLK_OUT. Configuring master device of cascade system with channelConfig API (setting it to MULTICHIP_MASTER) will enable OSC_CLK_OUT by default.

Regards,
Jitendra

0 Adam Yao94020 over 5 years ago in reply to Jitendra Gupta

TI__Genius 10910 points

Hi Jitendra,
Can OSC_CLK_OUT also be disabled by this API? Customer want they can switch this signal for test?

Thanks,
Adam

0 Jitendra Gupta over 5 years ago in reply to Adam Yao94020

TI__Guru 68170 points

In current firmware it's not supported but in furture DFP release this feature will be available where OSC_CLK_OUT can be disabled from Master.

Regards,
Jitendra

0 Adam Yao94020 over 5 years ago in reply to Jitendra Gupta

TI__Genius 10910 points

Jitendra,
If we configure the chip in single chip mode, will OSC_CLK_OUT has 40MHz clock output?

Thanks,
Adam

0 Jitendra Gupta over 5 years ago in reply to Adam Yao94020

TI__Guru 68170 points

It'll be enabled only when device is set as Master mode. So in single chip OSC_CLK_OUT is not enable by default.

Regards,
Jitendra

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AWR1243: Is OSC_CLK_OUT enabled/disabled by cascading cfg?