This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Part Number: IWR1642
Test environment: IWR1642 ES2.0 EVM + mmWave SDK 2.0
I tried to modify the L3 mapping. I added the code to change the value of SHMEMBANKSEL7TO4 to 0x02010101 before SOC_mpu_config() in SOC_deviceInit(). But I found after rebuild the soc lib and the ccsdebug code and run, I still can't change the value of the extend TCMA address from 0x40000 to 0x5FFFF.
But if I changed the shared memory alloc for MulticoreImageGen.exe to 0x00000105, then I can change the value from from 0x40000 to 0x5FFFF. It seems ROM code change the value of SHMEMBANKSEL7TO4 and made the remap work.
Why changing SHMEMBANKSEL7TO4 doesn't make L3 remap work if I do it in SOC_deviceInit()? Is there any steps I must follow? Thanks.
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to JohnH:
In reply to Chris Meng:
I set Shared memory alloc to 0x00000006 in makefile, rebuild the code, burn the qspi flash. After power on the board, I connect the CCS to view the value of SHMEMBANKSEL7TO4(address 0xFFFFE3CC) and found it is 0x10010101, instead of 0x01010101. Pls check at your side.
After communicating with the bootloader team, it looks like the "DSS_L3 Memory Organization for 16xx" section in the IWR16xx TRM will need to be updated to accurately reflect the L3 memory organization for IWR1642 ES2.0. The updated L3 memory layout is shown in the following figure (each bank is 128KB).
Therefore, only three of the shared L3 memory banks (3 x 128KB = 384KB) are available for allocation to the Master CR4F processor. The DSP core can still use up to six banks for a total of 6 x 128KB = 768KB.
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.