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AWR1642: AWR1642 Datasheet

Part Number: AWR1642
Other Parts Discussed in Thread: LP87702-Q1

Hi All,

AWR1642 datasheet suggests that 1.3V Analog and RF supply can be achieved by enabling the 1.3V internal LDO mode (VIN_13RF1 and VIN_13RF2 are to be shorted on the board).

In this mode, can the internal LDO be driven from PMIC e.g. by the 1.24V from LP87702-Q1 IC? This would be great for cost sensitive automotive application by removing LDO TPS7A5201-Q1 from the BOM. Kindly confirm.

Thanks,

John

  • Hi,

    We are checking with board designer and will get back to you

    thank you
    Cesar
  • Hello John,

    The minimum recommended voltage input on the 1.3V rail is 1.23V. Using 1.24V is very close to this margin, and it is likely that the input could dip below 1.23V during chirping due to large current transients. I would not recommend supplying with 1.24V.

    Regards,

    Adrian
  • Hi Adrian,

    Thanks a lot for the feedback. Under what circumstance is it advisable to use 1.3V internal LDO and in what circumstance is it advisable to use an external LDO?

    Since the 1.24V is too close to the internal LDO's minimum margin (internal LDO min/max is between 1.23V to 1.36V, how does supply tolerances affect performance? Just trying to understand the AWR1642 power requirements.

    Thanks,

    John

  • Hello John,

    Bypassing the internal LDO can help with thermal performance as the internal LDO can generate additional heat within the device.

    If you operate too close to the minimum input margin of the LDO it is very possible that the input may drop below this voltage during the large transients during chirping and the output may cease to regulate. I am not sure exactly what will happen to device performance in this case, but we cannot guarantee that the device performance will meet the datasheet specifications in such cases.

    Regards,

    Adrian