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PGA460-Q1: Is there any buffering of the Direct Data Burst?

David Kushnir1
Prodigy 20 points
Part Number: PGA460-Q1
Other Parts Discussed in Thread: PGA460

We are using the Direct Data Burst output feature to allow us to analyse the raw data from the PGA460.  The datasheet specifies a maximum clock frequency of 8MHz for the SPI CLK.  This makes sense considering the 1Msample/sec sampling rate.  I'm wondering what happens if my clock rate is slightly less than 8MHz and I take slightly longer than 1 usec to read out each sample?  Does the part buffer the sample data and it remains available until I've finished reading it out or is there no buffering and at some point I will begin to lose samples?

Regards

David Kushnir

Sr. Hardware Engineer

Campbell Scientific Canada

  • 0
    TI__Mastermind 27950 points

    Hi David,

    In the the Direct Data Burst mode, the device does not buffer any data, so if your SCLK is slightly less than 8MHz, you will begin to lose/skip samples.

    In the 12-bit/sample readout mode (SAMPLE_SEL = 1), you can keep track of the of which samples were skipped because the MS Byte is padded with a 4 bit sample counter so that the master controller can track the order of samples from the PGA460 device. If you were to skip a sample, and know exactly which sample were skipped by tracking the counter value, you could correct the timing or use the previous sample value for a given data point that was skipped in post-processing of the collected data. Note, in SAMPLE_SEL=1 mode, the sample rate is 2us (500kSamples/sec).