TPS53355: About VREG

Yuta Nishie

Genius 3760 points

Part Number: TPS53355

Tool/software:

Hi,

＜Question＞

Could you tell me why the voltage of VREG becomes 4V?

Could you tell me why the voltage of VREG changes to 5V after a certain time, and why the voltage drop of VOUT occurs?

＜Background＞

For several hours after the power is turned on, the voltage of VREG becomes 4V.

After a few hours, VREG (2ch) changes to 5V and the voltage of VOUT (1ch) drops as shown in the attached waveform.

At this time, the device is not operated (there is almost no load fluctuation).

Best Regards,

Nishie

4 months ago

0 Peter James Miller 4 months ago

TI__Guru 53535 points

Yuta Nishie

Can you please share the schematic and operating conditions? (Vin, Vout, Switching Frequency, Loading current)

What is the VDD voltage when this occurs?

Is there anything connected to BP other than a high-quality dielectric, low ESR, low ESL ceramic bypass capacitor?

If there is, what is connected?

How is enable driven? It is pulled up by VIN as soon as VIN rises, or is it delayed from VIN?

The 4V BP voltage prior to the shutdown and restart of the output voltage appears unsteady, like the BP regulator is overloaded. There appears to be an additional drop on BP, which is likely triggering the BP regulator's UVLO, causing a shutdown and restart of the IC when the BP regulator returns to regulation.

0 Yuta Nishie 4 months ago in reply to Peter James Miller

Genius 3760 points

Hi Peter-san,

Thank you for your support.

Peter James Miller said:
Can you please share the schematic and operating conditions? (Vin, Vout, Switching Frequency, Loading current)

Vin=12V, Vout=1.2V, Iout=max 20A, Fsw=500kHz. I will send you a circuit diagram by private message.

Peter James Miller said:
What is the VDD voltage when this occurs?

VDD=12V.

Peter James Miller said:
Is there anything connected to BP other than a high-quality dielectric, low ESR, low ESL ceramic bypass capacitor?

If there is, what is connected?

Could you check the circuit diagram?

Peter James Miller said:
How is enable driven? It is pulled up by VIN as soon as VIN rises, or is it delayed from VIN?

I measured the VIN and EN waveforms(1ch:VIN, 2ch:EN). Is there any problem with these waveforms?

Best Regards,

Nishie

0 Britton Jones 4 months ago in reply to Yuta Nishie

TI__Expert 6576 points

Hi Nishie, The team is looking into this and will reply to you within a few days

Best regards,

Britton

0 Amod Vaze 4 months ago in reply to Yuta Nishie

TI__Mastermind 24890 points

Hi Nishie-san,

Can you please share the customer schematic with me via email?

What is the VREG5 capacitor part number being used? Also, is this at room temp or other ambient temp - please specify what temp it is.

Is it possible to share the VIN, VREG, SW, VOUT waveforms during normal operation and when the dip occurs?

Also, how many units are exhibiting this issue? Are there good boards on which you can try the unit showing this issue?

Thanks,
Amod

0 Yuta Nishie 4 months ago in reply to Amod Vaze

Genius 3760 points

Hi Amod-san,

Thank you for your reply.

I sent you an email. I would appreciate it if you could check it.

Best Regards,

Nishie

0 Amod Vaze 4 months ago in reply to Yuta Nishie

TI__Mastermind 24890 points

Hi Nishie-san,

I responded to your email just now. Let us continue the discussion there.

Thanks,
Amod

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TPS53355: About VREG