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AM68A: AM68-SK: SLB9672 on MCU_SPI1 – tpm_tis_spi probe fails with error -110 (no SCLK on header)

Duc Nguyen — Mon, 24 Aug 2026 11:28:53 GMT

Part Number: AM68A

We are connecting an Infineon OPTIGA TPM SLB9672 (SPI) to the AM68-SK 40-pin header via MCU_SPI1.

Kernel reports: tpm_tis_spi spi1.0: probe with driver tpm_tis_spi failed with error -110

There is no /dev/tpm0 / /dev/tpmrm0.

Hardware wiring (CS0 test)

TPM signal	Header pin	SoC (expected)
SCLK	23	MCU_SPI1_CLK (D26)
MOSI	19	MCU_SPI1_D0 (E24)
MISO	21	MCU_SPI1_D1 (C28)
CS#	24	MCU_SPI1_CS0 (C27)
VDD	17	3.3 V
GND	25	GND
RST#	13	MAIN GPIO0_36 (W24), held HIGH

We also tested CS2 (pin 26, reg = <2> → spi1.2) with the same -110.

Software

CONFIG_TCG_TPM=y, CONFIG_TCG_TIS_SPI=y (built-in)
Overlay enables &mcu_spi1, pinmux on &wkup_pmx2:
- CLK/MOSI/MISO: mux mode 0
- CS0: mux mode 0 (or CS2 mode 1 when testing CS2)
DT node example (CS0):

dts

/dts-v1/;
/plugin/;

#include "k3-pinctrl.h"
#include <dt-bindings/gpio/gpio.h>

&mcu_rpi_header_gpio0_pins0_default {
	pinctrl-single,pins = <
		J721S2_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* G25 */
		J721S2_WKUP_IOPAD(0x0B8, PIN_INPUT, 7) /* G27 */
		J721S2_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* J26 */
		J721S2_WKUP_IOPAD(0x11C, PIN_INPUT, 7) /* J27 */
		J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (D25) MCU_SPI1_CS2.WKUP_GPIO0_15*/

	>;
};

&wkup_pmx2 {
	mcu_spi1_pins_default: mcu-spi1-default-pins {
		pinctrl-single,pins = <
			J721S2_WKUP_IOPAD(0x058, PIN_OUTPUT, 0) /* D26 CLK */
			J721S2_WKUP_IOPAD(0x05C, PIN_OUTPUT, 0) /* E24 MOSI */
			J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 0)  /* C28 MISO */
			J721S2_WKUP_IOPAD(0x064, PIN_OUTPUT, 0) /* C27 CS0 — OUTPUT mode 0 */
		>;
	};
};

&main_gpio0 {
	tpm_reset_hog {
		gpio-hog;
		gpios = <36 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "tpm-reset";
	};
};

&mcu_spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_spi1_pins_default>;
	#address-cells = <1>;
	#size-cells = <0>;
	ti,spi-num-cs = <1>; 

	tpm@0 {
		compatible = "infineon,slb9672", "infineon,slb9670", "tcg,tpm_tis-spi";
		reg = <0>;             /* → spi1.0 */
		spi-max-frequency = <1000000>;
	};
};

Log:

root@am68a-sk:/opt/edgeai-gst-apps# uname -a
Linux am68a-sk 6.12.17-ti-00773-gcdcaeac783e3-dirty #1 SMP PREEMPT Thu Apr  3 17:42:36 UTC 2025 aarch64 GNU/Linux
root@am68a-sk:/opt/edgeai-gst-apps# zcat /proc/config.gz 2>/dev/null | grep -E 'CONFIG_TCG_TPM=|CONFIG_TCG_TIS_SPI=|CONFIG_SPI='
CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_SPI=y
CONFIG_SPI=y
root@am68a-sk:/opt/edgeai-gst-apps# ls /sys/bus/spi/devices/
spi0.0  spi1.0
; echo
  cat /sys/firmware/devicetree/base/bus@100000/bus@28380000/spi@40310000/tpm@0/compatible 2>/dev/null | tr '\0' ' '; eroot@am68a-sk:/opt/edgeai-gst-apps#   cat /sys/firmware/devicetree/base/bus@100000/bus@28380o
okay
root@am68a-sk:/opt/edgeai-gst-apps#   cat /sys/firmware/devicetree/base/bus@100000/bus@28380000/spi@40310000/tpm@0/compatible 2>/dev/null | tr '\0' ' '; echo
infineon,slb9672 infineon,slb9670 tcg,tpm_tis-spi 
root@am68a-sk:/opt/edgeai-gst-apps#   hexdump -C /sys/firmware/devicetree/base/bus@100000/bus@28380000/spi@40310000/tpm@0/reg 2>/dev/null
00000000  00 00 00 00                                       |....|
00000004
root@am68a-sk:/opt/edgeai-gst-apps# cat /sys/kernel/debug/gpio | grep tpm-reset
 gpio-669 (                    |tpm-reset           ) out hi 
root@am68a-sk:/opt/edgeai-gst-apps# dmesg | grep -i tpm_tis_spi
[    8.236838] tpm_tis_spi spi1.0: probe with driver tpm_tis_spi failed with error -110
root@am68a-sk:/opt/edgeai-gst-apps#   ls -l /dev/tpm* 2>/dev/null || echo "NO /dev/tpm*"
NO /dev/tpm*

What already works

/sys/bus/spi/devices/spi1.0 exists
spi@40310000 status = okay
Live DT: correct compatible and reg
RST GPIO hog shows out hi (tpm-reset)
Decompiled overlay shows expected pad offsets for CLK/MOSI/MISO/CS0

What fails

Probe always timeout (-110)
On scope/logic analyzer, we do not see SCLK (and related SPI activity) on header pin 23 during unbind/bind of tpm_tis_spi

Questions for TI

For AM68-SK, is MCU_SPI1 on the 40-pin header the correct interface for an external SPI TPM, and are the pinmux modes above correct for CS0 (and CS2)?
Any known requirement so that McSPI actually toggles CLK/CS on these pads when tpm_tis_spi probes (extra DT flags, power domains, clocks)?
Could our overlay on &mcu_rpi_header_gpio0_pins0_default (removing SPI pins from the GPIO group) still leave pads in a state where SPI signals never reach the header?
Recommended way to confirm at runtime that 40310000.spi pinmux is applied to the header pins?
Any TI reference DT or app note for SPI slave on MCU_SPI1 (CS0/CS2) on AM68-SK?

Thanks.

RE: AM68A: AM68-SK: SLB9672 on MCU_SPI1 – tpm_tis_spi probe fails with error -110 (no SCLK on header)

Divyansh Mittal — Thu, 27 Aug 2026 05:26:59 GMT

HI Duc,
There is no TI refernce on the same.
Since it is the SLB9672 driver that timeouts, you want to add significant debug logs to that driver and share with the SLB9672 vendor to help you.
Unfortunately, there is not much here I can do to help you.

RE: AM68A: AM68-SK: SLB9672 on MCU_SPI1 – tpm_tis_spi probe fails with error -110 (no SCLK on header)

Duc Nguyen — Thu, 27 Aug 2026 01:45:44 GMT

Hi Divyansh,

Thanks for pointing me to the SPI documentation. I followed the spidev_test example and was able to verify that the AM68A MCU_SPI1 is working correctly as an SPI master.

I tested /dev/spidev1.0 with:

/tmp/spidev_test -D /dev/spidev1.0Code

The result was:

spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 kHz)Code

I also verified the signal with an oscilloscope. When using spidev_test, I can clearly see valid SPI waveforms on CS, CLK, and MOSI. Therefore, the MCU_SPI1 controller, pinmux configuration, and physical SPI connections appear to be working.

However, when I bind the same SPI device to tpm_tis_spi:

echo spi1.0 > /sys/bus/spi/drivers/tpm_tis_spi/bindCode
I still get:

tpm_tis_spi spi1.0: probe with driver tpm_tis_spi failed with error -110
-sh: echo: write error: Connection timed outCode
I also reduced the DT SPI frequency to 500 kHz and verified that the DT property is:

spi-max-frequency = 500000
After the tpm_tis_spi probe, the SPI statistics show:

messages: 52
transfers: 52
bytes: 54
bytes_tx: 4
bytes_rx: 54
errors: 0
timedout: 0Code

This is interesting because the SPI controller itself does not report SPI transfer errors or controller-level timeouts, while the TPM driver still returns -ETIMEDOUT.

The device is correctly described as:

modalias: spi:slb9672

OF_COMPATIBLE_0=infineon,slb9672
OF_COMPATIBLE_1=infineon,slb9670
OF_COMPATIBLE_2=tcg,tpm_tis-spiCode
and spi1.0 is initially unbound from any driver.
Based on these results, it looks like the issue is now specific to the tpm_tis_spi probe/TPM SPI protocol interaction, rather than the MCU_SPI1 controller, pinmux, or basic SPI master functionality.

Could you please advise what SPI transaction the tpm_tis_spi driver expects during the SLB9672 probe, and whether there are any AM68/MCU_SPI-specific requirements or known issues with tpm_tis_spi on MCU_SPI1?

In particular, it would be helpful to know whether you recommend:

- Checking the exact SPI command sent by the TPM driver during probe.
- Verifying the SPI mode (CPOL/CPHA) expected by SLB9672.
- Checking whether any additional DT properties are required for the SLB9672.
- Whether there is a TI reference configuration for SLB9672 + MCU_SPI1 on AM68A-SK.

Thanks.

01:50:00 query returned open=false

RE: AM68A: AM68-SK: SLB9672 on MCU_SPI1 – tpm_tis_spi probe fails with error -110 (no SCLK on header)

Divyansh Mittal — Wed, 26 Aug 2026 06:29:14 GMT

Hi Duc,
Let me know if this documentation helps: https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j721s2/11_02_01_03/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/SPI.html

I haven't reviewed or pin configuration yet, but

[quote userid="696960" url="~/support/site-support-group/site-support/f/site-support-forum/1675914/am68a-am68-sk-slb9672-on-mcu_spi1-tpm_tis_spi-probe-fails-with-error--110-no-sclk-on-header"]

Any TI reference DT or app note for SPI slave on MCU_SPI1 (CS0/CS2) on AM68-SK?

[/quote]

Not sure if you are trying to configure AM68 SPI as master or slave?
If you are configuring it as a master, I would recommend you try out the example given in the above link (spidev_test.c) with the given dt settings on mcuspi and see whether you are seeing clock output, if you are, then it is most likely the tpm driver issue.

RE: AM68A: AM68-SK: SLB9672 on MCU_SPI1 – tpm_tis_spi probe fails with error -110 (no SCLK on header)

Divyansh Mittal — Tue, 25 Aug 2026 06:41:32 GMT

Hi Duc,
Looking internally, please expect a response by end of this week.

RE: TIDA-010089: Altium Design files for this reference design

Ethan Yu(SH) — Fri, 21 Aug 2026 10:01:07 GMT

Hi Ethan,

It seems the design files were taken down from Ti.com. I have shared the design source files to your email.

Thank you

TIDA-010089: Altium Design files for this reference design

Ethan Della-Negra — Fri, 21 Aug 2026 08:48:47 GMT

Part Number: TIDA-010089

Hello TI Support,

I am modifying the TIDA-010089 reference design to integrate a custom MCU for the DAC.

Could you please provide the native Altium Designer source files (schematic and PCB layout) for this design? If you need to send them via a private channel, please let me know how to proceed.

Thank you, Ethan

SN74AVC4T774: PCN - SN74AVC4T774PWR

Nitin Gond — Tue, 18 Aug 2026 06:35:25 GMT

Part Number: SN74AVC4T774

Hi Team,

We have recived the folllowing PCN for the below part : SN74AVC4T774PWR

Could you please confirm is this PCN will impact on Fit, form and function.

PCN20260409005.1A.pdf

Thanks,

Nitin Gond.

RE: SN74AVC4T774: PCN - SN74AVC4T774PWR

Jack Guan — Wed, 19 Aug 2026 22:17:00 GMT

Hi Nitin,

The changes provided in the PCN document highlight the total changes- the extensive testing has been conducted to ensure that the datasheet min/ max characterization data is still intact, with only the thermal values being updated.

Thanks,

Jack

RE: SN74AVC4T774: PCN - SN74AVC4T774PWR

Nitin Gond — Wed, 19 Aug 2026 04:36:51 GMT

Hi Josh,

Thank you for your input.

Could you please review the latest test results and confirm the variations observed compared with the previous test results? It would be helpful if you could highlight any significant deviations or changes in the measured parameters and provide your assessment of the potential reasons for these differences.

I would appreciate your support and technical feedback on this.

Regards,

Nitin

RE: SN74AVC4T774: PCN - SN74AVC4T774PWR

Joshua Salinas — Tue, 18 Aug 2026 17:44:10 GMT

Hello Nitin,

Since this part has a new die, only changes to the PW thermal values were made.

I would evaluate if the changes made to the PW thermals has an impact to your overall system.

Regards,

Josh

LMR38010-Q1: DC-DC IC Failed

Gobi Rajagopal — Thu, 06 Aug 2026 09:04:18 GMT

Part Number: LMR38010-Q1

LMR38010FSQDDARQ1 Failure Observation

We observed failure (short circuit) of two LMR38010FSQDDARQ1 devices.

Initially, the EN pin was directly connected to the VIN pin, and the circuit operated without any issues.

Later, a Common Mode Choke (CMC) was added in the input line to improve EMI/EMC performance, and the EN pin was connected to the Ignition (IGN) input instead of the IN pin. Following this change, the LMR38010FSQDDARQ1 devices started failing and became short-circuited.

Subsequently, 47 k series resistor was added in the EN pin path, after which the circuit has been operating reliably without any failures.

Could you help identify the possible root cause of this failure?

According to the datasheet, the EN pin can withstand voltages greater than 80 V, whereas our system input voltage is only 24 V, our total load current is 60mA and DC-DC output is 13V (24V to 13V), 400KHZ SW freq

RE: LMR38010-Q1: DC-DC IC Failed

Tony Koulong — Wed, 12 Aug 2026 20:52:54 GMT

Hi Gobi,

[quote userid="646198" url="~/support/site-support-group/site-support/f/site-support-forum/1671016/lmr38010-q1-dc-dc-ic-failed/6448114"]

In datasheet,
Vin max voltage is 85V
EN max voltage is Vin + 0.3 V

Query: EN max voltage means 85 + 0.3V or 24V + 0.3V (if we apply Vin is 24V from Vbat line)
which one is correct ?

[/quote]

True about EN abs max.

For your application it is 24V+0.3V. EN voltage cannot exceed this or it would failed. This is dependent of your VIN voltage.

RE: LMR38010-Q1: DC-DC IC Failed

Tony Koulong — Wed, 12 Aug 2026 20:42:51 GMT

Hi Gobi,

[quote userid="646198" url="~/support/site-support-group/site-support/f/site-support-forum/1671016/lmr38010-q1-dc-dc-ic-failed/6448042"]If yes , now, we added a series resistor.
(ie) IGN line --> 47K series resistor --> EN pin ..is this ok ?[/quote]

Yes. The 47kΩ series resistor limits the peak transient surge current entering the EN pin, thereby preventing thermal overload and subsequent short-circuit failure of the internal ESD protection structures.

RE: LMR38010-Q1: DC-DC IC Failed

Gobi Rajagopal — Wed, 12 Aug 2026 08:56:03 GMT

In datasheet,
Vin max voltage is 85V
EN max voltage is Vin + 0.3 V

Query: EN max voltage means 85 + 0.3V or 24V + 0.3V (if we apply Vin is 24V from Vbat line)
which one is correct ?

RE: LMR38010-Q1: DC-DC IC Failed

Gobi Rajagopal — Wed, 12 Aug 2026 07:31:16 GMT

You mean, if Vbat = 24V and IGN = 24.4V , then EN pin s getting fail or not ? (>0.3V)

If yes , now, we added a series resistor.
(ie) IGN line --> 47K series resistor --> EN pin ..is this ok ?

RE: LMR38010-Q1: DC-DC IC Failed

Tony Koulong — Wed, 12 Aug 2026 07:03:07 GMT

Hi Gobi,

Did you measure the transient voltage of IGN with the common mode choke?

My observation is that a positive transient on the IGN line spikes higher than the voltage at the VIN pin, the internal diode becomes forward biased.

Mother question would be "Without the common mode choke. Is the IC still failing while EN is tie to IGN

RE: LMR38010-Q1: DC-DC IC Failed

Gobi Rajagopal — Wed, 12 Aug 2026 05:51:29 GMT

Already we referred the datasheet. we knew this information

Vbat = 24V
IGN = 24V

RE: LMR38010-Q1: DC-DC IC Failed

Tony Koulong — Wed, 12 Aug 2026 00:22:02 GMT

Hi Gobi,

I am checking the absolute maximum rating for EN. Can you measure the transient voltage of the IGN line and make sure it does not exceed Vin + 0.3V?

I suspect that EN is seeing a higher voltage than it is supposed to, which may be due to a high surge current that quickly melts the tiny internal diode.

RE: LMR38010-Q1: DC-DC IC Failed

Gobi Rajagopal — Tue, 11 Aug 2026 04:56:34 GMT

Yes ..it is working fine

only problem is if i connect EN pin to IGN line, then only Buck IC getting fail.
is common mode choke creating any impact?
Input voltage is 24V for Vbat and IGN line

is buck will create any differential voltage between Vbat line and IGN line?

RE: LMR38010-Q1: DC-DC IC Failed

Tony Koulong — Mon, 10 Aug 2026 16:12:35 GMT

Hi Gobi,

Please allow sometime to investigate this issue.

Have you tried to tie EN to VIN with the common mode choke connected?

RE: LMR38010-Q1: DC-DC IC Failed

Gobi Rajagopal — Mon, 10 Aug 2026 11:48:48 GMT

I shared the Sch and but no response from your end

RE: LMR38010-Q1: DC-DC IC Failed

Gobi Rajagopal — Fri, 07 Aug 2026 09:19:27 GMT

TPS51397A: Package details

Ritika Saluja — Thu, 06 Aug 2026 02:47:48 GMT

Part Number: TPS51397A

Hi,

No package information available in datasheet:TPS51397A 4.5-V to 24-V, 10-A Synchronous Buck Converter with ULQ™ Operation datasheet (Rev. A)

Also, please confirm either RJE0020B or RJE0020A is right package to use for this part?

Regards,

Ritika Saluja

RE: TPS51397A: Package details

Nikhil S Bhardwaj — Fri, 07 Aug 2026 08:12:00 GMT

Hi Ritika

We can confirm that it is RJE0020B to be used and here is the package drawing for your reference. We are working internally to have it published on the website soon.

Thanks for pointing out.

e2e.ti.com/.../RJE0020B_5F00_ePOD.pdf

Regards

Nikhil