Hi,
I want to calculate 16-bit settling time of the MUX when channels are switched. The datasheet specifies settling time of 33ns for VDD =5V. The definition of settling time is given as "Transition time is defined as the time taken by the output of the device to rise or fall 10% after the address signal has risen or fallen past the logic threshold. The 10% transition measurement is utilized to provide the timing of the device, system level timing can then account for the time constant added from the load resistance and load capacitance"
Does this mean total settling will be "33ns"+ "16-bit settling time of load capacitance and resistance" ? Or should I use equivalent time constant by considering Ron and Cdrain with load circuit, and then calculate 16-bit settling time, and finally add 33ns ?
From 16-bit settling time I meant output settles to less than 1 LSB error(1/2^16).
Thank you,
Shaury
