Other Parts Discussed in Thread: TMUX1309, , SN74HCS138, SN74HCS151
As shown in the figure below, whether SN3257 can implement this topology, please help to confirm
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The short answer is yes - this is a possible configuration of the device.
The long answer is that it depends on the SPI frequency that you are running at. Putting multiplexers in parallel like this is going to increase the effective capacitance of the switch block which could degrade bandwidth; however it may not be an issue depending on what frequency you are trying to achieve with this SPI implementation.
Please let me know the frequency you are working at and I will verify if this is okay or not.
10 MHz is much below the limit of either the SN3257-Q1 or the TMUX1309, and will work fine.
Alternatively, it would also be possible to handle the /CS signal with a demultiplexer like the SN74HCS138, and the MISO signal with a multiplexer like the SN74HCS151.