As the picture shows, the red wine is the leakage line.
Is there such a problem, or what should be paid attention to when designing
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As the picture shows, the red wine is the leakage line.
Is there such a problem, or what should be paid attention to when designing
Hey Sam,
Is the concern here about the supply backpowering through to the supply from S1?
There is an ESD cell that goes from S1 to D. The diode will only forward bias when you are ~0.5V above the supply. So as far considerations go, it's recommended to not input voltages on the I/O's (S1, S2 or D) while the device is powered off. It is also recommended to use the device with voltage inputs that stay within the rails (From VDD to VSS).
Thanks,
Rami