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SN74CB3Q3345: Feasibility of using bus switch between the FPGA and MEMS sensor.

Part Number: SN74CB3Q3345
Other Parts Discussed in Thread: TXB0108, TXB0102, TXS0102

Hello TI Team,

I would like to inquire about the feasibility of the following concept or seek expert advice on suitable TI product models.

We have a new project that involves using an FPGA to access MEMS Sensors with different voltage levels. In order to protect the FPGA's IO pins and switch IO signals, we are considering adding a Bus Switch between them, such as SN74CB3Q3345PWR or SN74CB3T3245PWR, as shown in the two diagrams below.

1. Since SN74CB3Q3345PWR is a rail-to-rail switch, it may damage the FPGA pins when VDUT voltage exceeds the FPGA's VIO voltage. Therefore, we need to add a clamp diode to the signals between the FPGA and SN74CB3Q3345PWR to protect the FPGA pins.

2. The maximum voltage output of SN74CB3T3245PWR is limited to VCC. If we supply VIO voltage to both the FPGA's IO and SN74CB3T3245PWR simultaneously, can we eliminate the previously mentioned clamp diode?

3. The recommended range for SN74CB3T3245PWR VCC is only 2.3V to 3.6V. If we set its VCC to 1.2V or 1.8V, can the bidirectional signals between the FPGA and Sensor still be transmitted normally? Additionally, can it limit potentially excessive voltages to within 1.2V or 1.8V to protect the FPGA pins?

4. SN74CB3T3245PWR is suitable for high-to-low voltage IO applications. If the FPGA's VIO voltage is 3.3V and VDUT is 5V, can it correctly transmit bidirectional signals?

Thank you in advance for your suggestions.

  • Hi Wei-jia 
    The team is currently on holiday. Please allow until Monday next week for a detailed response here. 

    In the mean time, I can give you some high level background on this. All these devices are passive switches so output voltage will be about the same as the input voltage. The SN74CB3T devices have a form of level shifting. Where the output voltage is clamped to Vcc and the input can go up to 5V. And the supply voltage is restricted to 2.3V to 3.6V. 

    I would also recommend looking at TI’s translators for this application as well. 



  • Hi Stephen,

    Thank you for your response.

    I have looked into the TXS0108, but unfortunately, its VIH and VIL specifications do not meet the LVTTL and LVCMOS standards unless the IO current is sufficiently small. However, we cannot predict the final IO current value, so there may be abnormal signal level detection due to excessive current.

    The VIH and VIL of the TXB0108 seem to be closer to the LVTTL and LVCMOS standards, but its documentation mentions that it should not be used for I2C applications, so it doesn't align with our intended use.

    As for the LSF series, it requires VREF_B to be 1V higher than VREF_A, and it seems that appropriate pull-up resistors need to be calculated.

  • The TXS is a passive switch and does not actually have real VIL/VIH limits; see [FAQ] Why are the TXS01xx VIH/VIL specifications so stringent? And it should not require external pull-up resistors.

    The LSF does not require that the VREF_B voltage is identical to any I/O pull-up voltage, so you could simply use 5 V.

  • Hello Wei-jia,

    1. Yes, you are correct that SN74CB3Q3345PWR is a rail-to-rail switch and it may damage the FPGA pins when VDUT voltage exceeds the FPGA’s VIO voltage. Therefore, adding a clamp diode to the signals between the FPGA and SN74CB3Q3345PWR is a good idea to protect the FPGA pins. 

    2. Yes, you can eliminate the clamp diode if you supply VIO voltage to both the FPGA’s IO and SN74CB3T3245PWR simultaneously. This is because SN74CB3T3245PWR has a built-in level shifter that limits the output voltage to VCC. Therefore, the FPGA pins will not be exposed to voltages higher than VIO. 

    3. Unfortunately, you cannot set the VCC of SN74CB3T3245PWR to 1.2V or 1.8V, because these values are below the recommended operating range of 2.3V to 3.6V. If you do so, the device may not function properly and the bidirectional signals between the FPGA and Sensor may not be transmitted normally.

    4. Unfortunately, SN74CB3T3245PWR is not suitable for high-to-low voltage IO applications. If the FPGA’s VIO voltage is 3.3V and VDUT is 5V, the device will not be able to correctly transmit bidirectional signals. This is because the device requires that the input voltage on any port be less than or equal to VCC. If the input voltage exceeds VCC, the device may be damaged. 

    As Stephen pointed out, we have a team that handles our translator portfolio. If you think one of these parts is more suitable for your application, then I can move this post to their group!

    Hope this helps. Let me know if you have additional questions here. 



  • Hi Alex, Clemens, and Stephen,

    Following your explanations and suggestions, to simplify the circuit components and ensure that the IO voltages on both sides are limited to the respective VCCA and VCCB of the translators, I intend to use TXS0102 and TXB0102 as voltage level translators between the FPGA and the sensor. Specifically, TXS0102 will be dedicated to I2C or SPI signals, while TXB0102 will be used for GPIO.

    Thank you all for your assistance, and if there are any additional suggestions, please feel free to share them.