TMUXS7614D: TMUXS7614D timing specifications related to VL/RESETn during power-on.

Part Number: TMUXS7614D


hi sir

 

I have another question regarding the operation of the VL/RESETn pin. In the datasheet, I could not find any timing specifications related to VL/RESETn during power-on.

What I would like to understand is the time required to clear or initialize the outputs. Currently, there are two possible methods:

  1. Clearing the outputs by sending a scan configuration through the SPI interface.
  2. Clearing the outputs by asserting the RESET function.

I would like to compare the time required for a power-on reset (using VL/RESETn) versus clearing the configuration through SPI.

Any guidance or timing information regarding the VL/RESETn behavior during power-up would be greatly appreciated.

  • Hi Chen,

    Based on the datasheet for the TMUXS7614D, the VL/RESETn pin functions as the power supply for the digital interface rather than a standard logic reset input, which is why specific timing characteristics for its operation are not explicitly listed. Consequently, the comparison between the two methods relies on their operational mechanisms rather than a direct side-by-side timing specification. When clearing outputs via the SPI interface, the timing is deterministic and active. A possible way to calculated time is by the duration of your SPI write command (determined by your specific clock frequency) plus the Turn-Off Time (t_OFF) found in the switching characteristics table.


    Use SPI for speed and precision. Only use VL/RESETn for resets or initial power-up.

    Thank you,

    Arya