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SN74CB3T3257: SN74CB3T3257

Part Number: SN74CB3T3257
Other Parts Discussed in Thread: TS3A44159, TS3A5018, SN74CB3Q3257, TS5A3359, SN74CBTLV3253

Hi Support Team,

I am going to to use SN74CB3T3257 to switch the signal from the Tester channels (TC) to two devices (DUT), please help to support on the following questions:

1. The chip is powered by 3.3V, but 1.8V would be the logic interface between TC and DUT, please help to confirm if this is OK?

2. The clock signal will pass through the chip, any problem at 200Mhz?

3. The signals include both input and output, please let me know if any propagation delay when then the signal travel in bio-direction? 

4. I also found another chip - TS3A44159 that would be suitable for my application. Any comparison between the SN74CB3T3257 and TS3A44159, which one is better for my application (as above: logic voltage, speed, delay...)?

5. My application need at least 50 ICs for all signals switching, Any recommendation for power supply and logic control selection in-out...? For example: the whole CHIP will be powered by 3.3V@400mA; each 10 pins (S) will be control by 1 relays (combine two form of G6K-2P-Y DC3 relay to H via 10K to 3.3V and L via 470R to GND; all EN pins will be tie L (GND). If use either SN74CB3T3257 or TS3A44159, is this design OK?

Thanks You,

Phuc Le.

  • Phuc Le,

    1) The SN74CB3T3257 device is a level shifting switch and I would not recommend using this for your application.

    2) 200MHz clock signals would start to reach the limit of the TS3A44159 so I would recommend a device with more bandwidth like the SN74CB3Q3257 or the TS3A5018

    3) All the signal switches are bi-directional. The SN74CB3Q3257 propagation delay stated in the datasheet is 200ps.

    4) See above comments

    5) The SN74CB3Q3257 is a low power switch and will consume <1mA. The control logic pins are Hi-Z inputs and will not need much power to toggle and you may tie them together.

    Let me know if you have additional questions.

    Thank you,
    Adam
  • Hi Adam,

    1. Thanks for your advice. I supposed that with 1.8V IO level, my signal can pass through chip without any translation - it's still in the linear region of input vs output voltage (from 0 to 2V). If my clock signal is limited under 100Mhz, I think this chip is OK. 

    2. Thanks for your recommendation. I would refer to use SN74CB3Q3257 for my application because the pin function and package are the same as SN74CB3T3257. Below is the implement for my design that use SN74CB3Q3257, Please let me know if this OK.

    + VCC (Supply voltage) : 3.3V (can be 2.3V-3.6V)

    + VIL (High-level control input voltage): 3.3V (>2V)

    + VI/O (Data input/output voltage): 1.8V (signal can pass from 0-5.5V wo translations)

    + Clock signal: 200Mhz (<500Mhz) but need more your advice on the item#3 (options)

    3. This is problem when I want to swept frequency with 1.25ns setting resolution . If the propagation delay of chip is 0.2ns, adding delay wire + loading on PCB... I believe the actual input clock signal to DUT will be pushed out. How do you think about this? or any better parts can do zero-delay buffer?

    5. Thanks for your advice. Allowable current of my control word bit is 30mA/pin that enough to toggle 10 logic control pins (S) without relay. But for sure, the relay still there.

    Thanks,

    Phuc Le

  • Phuc,

    1) I don't recommend this device because you would be paying for a translation feature that you are not using when there are lower cost options available.  100MHz is approaching the -3dB attenuation point for this device so it will depend on if your signal chain can handle this -3dB loss.

    2) The voltages you have chosen will work for the SN74CB3Q3257

    3) Most silicon based solid state signal switches will have some propagation delay in the ~100ps to 1ns range.  I'm not sure what you mean in your question on what you are attempting to accomplish.  Do you have a diagram to illustrate?   

    Thank you,

    Adam  

  •    

    Hi Adam,

    Again, thanks for your responses.

    1. I agree with you.

    2. I will go ahead with this chip.

    3. Please see the below diagram for my implement design. Clock signal of test block 2 is used as ref_clock for PLL validation, so that is the reason I don't want to have any delay between clock sources and target. Initial plan is to use solid-state switch, but now I am going to change to mechanical switch to reduce the propagation delay. Hope to have some inputs/recommendation from your site?

    4. Additional question for JTAG signals. I intended to program JTAG chain by three different methods so I selected the 3-to-1 analog switch as the 2nd option for switching signals. The same voltage supply and level signal control as SN74CB3Q3257, please let me know if TS5A3359 can work for my application?

    Thanks,

    Phuc Le.

  • Phuc Le,

    3) I'm not familiar enough with mechanical relays to make a recommendation.

    4) Most of the JTAG applications I have seen use 4 signals so you will need to either use 4x TS5A3359 or a larger channel count switch and have 2x SN74CBTLV3253 for example.

    Thank you,
    Adam