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Latch-Up is a condition where a low impedance path is created between a supply pin and ground. This condition is caused by a trigger (current injection or overvoltage), but once activated, the low impedance path remains even after the trigger is no longer present. . Latch-Up is not a risk if the voltage and current levels applied to the device adhere to the absolute maximum ratings.
The "Latch-Up Performance Meets 100 mA per JESD78 Class II Level A on all Pin" means that the TMUX6136 will protect up to 100mA during latch-up.
Can you explain your use case and how much latch up protection you need?
