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TS5A23166: Isolation in Powered-Down Mode

ttd
Mastermind 8050 points
Part Number: TS5A23166

Dear Technical Support Team,

TS5A23116 has a Isolation in Powered-Down Mode(V+=0) and following E2E post shows the detail of isolation related to the leak spec.

So TS5A23116  can input the signal to NO1ⅴNO2 during V+=0.

https://e2e.ti.com/support/switches-multiplexers/f/388/p/835338/3094933?tisearch=e2e-sitesearch&keymatch=yuyama#3094933

Is there any specification about ramp up time(like Δt/ΔＶof logic device(ioff) ) of supplying voltage to keep Hi-z.

Then I think IN1/IN2 should be L (OFF) to keep Hi-z.

Best Regards,

ttd

  • 0
    TI__Expert 5660 points

    Hi TTD,

    Thank you for posting to E2E.

    Because TS5A23166 features isolation in powered-down mode, the switch will be in the high-impedance state when supply voltage V+=0, as stated in the E2E post you referenced.

    If supply voltage is applied (V+ > 0), to keep the high-impedance state, IN1 and IN2 should be below the input voltage logic low level VIL (0.8 V).

    Could you clarify what specification you are looking for when you refer to ramp up time? The turn-on time and turn-off time specifications are available in the datasheet (page 10) for different supply voltages. Turn-on time is the time for the switch path to reach the ON state when IN1/IN2 reaches the input voltage logic high (1.5 V). You can learn more about switch timing characteristics in this TI Precision Labs video.

    Regards,

    Kate

  • 0 in reply to Kate Dickson
    TI__Expert 5660 points

    Hello,

    I am closing this thread but please feel free to respond if you need further assistance!

    Best regards,

    Kate