When we set D(0V) connect to S1 and S2 is floating, we could measure a 0.3C~1V on S2 pin.
Could you help to explain why S2 is not 0V?
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depending on the frequency and voltage level the LVDS signal is running at, it could contribute up to 0.26V (500MHz, 3.3V) due to off-isolation (Figure 3 in the Datasheet).
Other sources could come from parasitics within the CMOS switch.