Other Parts Discussed in Thread: SN74CBTLV3251, OPA333, OPA388
Hello TI Experts,
I wanted to confirm the behavior of TMUX1108 and Fail-Safe logic feature
If I understand correctly, fail safe allows the control pins to be biased upto 5.5V above VSS while supply is OFF (VDD = 0) disconnecting all channels
Quoting the datasheet...
[This feature allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage]
However, as per maximum rating source and drain voltages (Vsx, Vd) are limited to -0.5V to VDD+0.5 which means the device does not support partial power down, i.e. VDD = 0
#1) So now I am unclear how fail-safe exactly protects the device and what is the advantage / intended use of Fail Safe feature?
It appears that TMUX1108 negate the need to power down VDD to save power, i.e.
assuming VDD = 5V, maximum leakage / supply current is given
Is(off) + Id(off) = 5nA
IDD = 1μA (Logic Input = 0V or 5V)
#2) what is the worst case leakage and supply currents for Analog inputs 0V ≤ Vsx ≤ 3V?