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SN74LV4052A: Four Controller's UART Multiplexing in 1 single connector for debugging purpose

Karthick Venkatachalam
Prodigy 100 points
Part Number: SN74LV4052A
Other Parts Discussed in Thread: TMUX1309

Hi.

For a new design, we have planned to use four microcontroller's in a single board. Each microcontroller will transfer data in CAN to different peripherals from parallel port interface which is connected from Host. so each controller will act as 1 channel. Now we have planned to use UART interface for debugging for each controller. But in the front panel we are having less space so we have planned to use a single DB9 connector for accessing all 4 microcontrollers in UART interface by doing multiplex. It is required to select the UART channel through DIP switches or some other medium. But this should be configurable by the user in the front panel/on-board. Is it possible to use the SN74LV4052A IC for UART interface multiplexing? Attached the Logic Block diagram for your understanding. Please confirm my assumption is correct and also suggest some more options which should be more efficient and working without any crosstalk.

Regards,

Karthick V

  • 0
    Prodigy 100 points

    Particular uC UART can be selected based on these control signals. This can be controlled through on board FPGA or DIP switch or Jumper settings. Whether these can be configured on both way Mux/De-Mux(To read Microcontroller’s status from outside environment and to write commands to execute it in Microcontroller’s, All should happen via front panel DB9 connector – Please confirm the assumption is correct

  • 0
    Guru 272990 points

    Yes, the SN74LV4052A (or a more modern device like the TMUX1309) can be used for this application.

    Use the "Insert Media" button to attach an image.

  • 0 in reply to Karthick Venkatachalam
    TI__Intellectual 2694 points

    Hi Karthick,

    Could you please attach the logic diagram to give us more clarity on the use case.

    TMUX1309 is a newer 2ch, 4:1 Mux and will be a good fit based on what I understand but would like to review the block diagram to make sure we are not missing anything. 

    TMUX1309 features - Wider supply range 1.62V to 5.5V, 1.8V logic compatible, supports Fail-safe logic that simplifies power sequencing (control pins can power up independent of chip supply).

    Regards,

    Sandesh

  • 0 in reply to Sandesh Rawool
    Prodigy 100 points

    Hi Sandesh,

    Attached Block diagram for your understanding.

    Regards,

    Karthick V

  • 0 in reply to Karthick Venkatachalam
    TI__Intellectual 2694 points

    HI Karthick,

    This helps to confirm that the 2ch, 4:1 configuration is the right choice for this use case and I would recommend the TMUX1309 device. 

    The SxA channels will be connected to the uC TXx and the SxB channels will be connected to the uC RXx. The DA - TX and DB - RX are connected to the DB9.

    The device is a passive switch and bi-directional in operation so uC to DB9 and/or DB9-uC communication will work.

    There is a EN/ pin that enables or disables the chip/switches. If you want capability to enable or disable all switches then please make sure to provide the control VIH/VIL (VDD or GND to keep it simple) capability. If you are ok to keep either of the SxA or SxB switch ON at any given time, EN/ can just be tied to GND and chip will be always ON. My recommendation is to keep option available to disable the switch for any debug purposes i.e. have capability for both high and low control signal.

    The A0/A1 pins are the channel select pins (Table 8-2 in datasheet has truth table). As long as the correct voltage (VIH = High and VIL = Low) is provided to the control pins, they will work. You can provide this using FPGA or jumper settings or DIP switch. 

    A0 / A1 / EN/ are just digital control pins and work with simple VIH/VIL logic. My recommendation is to use the available VDD or GND signal when using Jumpers or DIP switch as you always have a VDD and GND plane available. The VIH/VIL requirement is listed in table 7.7 of the datasheet and you pick the one per the supply voltage of the TMUX1309. If the FPGA is on a different voltage rail, please make sure the VIH/VIL levels are followed.

    For guidelines on decoupling capacitor and layout, please refer to Section 10 and 11 of the datasheet.

    Let us know if any further questions.

    Thank you,

    Sandesh