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TS3A5018: Whether NC pin can be used as "AND" logic with other signal at OFF state?

Part Number: TS3A5018

Hi Team,

Whether "NC" pin can be used as "AND" logic with other signal at OFF state?  The application is as the structure below: M1 and M2 are two different SPI masters. And M1 has two SPI slave devices S1 and S2. TS3A5018 is used as switch for S1 to connect with M1 or M2. I find in the datasheet, the INC leakage is <10uA at OFF state.  Does "NC" is high-impedance state for OFF state? And the TS3A5018 could be implemented as the structure below? Thanks for your support. 

  • Hi Tess

    NC is high impedance under the following conditions:

    1. VDD = 0V-> this is where the powered off leakage comes from which is going to be between -10uA and 10uA worst case. NC,NO, and COM are all high impedance

    2. /EN = Logic High -> when the Device has a logic 1 on the enable pin of the device NC, COM, and NO will all be high impedance.

    3. IN = Logic High -> If Device has power and is enabled NC will be high impedance only when the IN pin has a logic high on it.

    From the MUX point of view - there is no problem with this structure. However this structure couldn't be used to mux the CS line of the application - as since S1 and S2 are effectively shorted together when NC is closed - this means S1/S2 would have the same CS line if that line is used in the muxing. If you are only using this configuration for MOSI/MISO/SCLK signals I don't see an issue - but the CS line will have to be done independently or else when NC is closed both S1 and S2 would be selected at the same time by M2.

    If you have any other questions or need any further clarification - please don't hesitate to reach out!

    Best,

    Parker Dodson