See below questions I got:
Application: recording analog video to uSD CARD.
We are evaluating TS3A27518E in our Lab and we have encountered following problem which needs URGENT attention.
This is how signals + clk looks like when we bypass MUX:
And as you can see while rising edge of clock, data is Valid.
On the other Hand, when those signals pass through MUX, we got a violation:
You can see clock is moving relative to data and on the rising edge data is NOT VALID.
We can see that data is staying relative to each other in phase but clocking phase is shifting.
We would kindly appreciate any feedback regarding…