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Part Number: TS5A22362
Hi TI experts,I'm trying to some circuit simulation to test the TS5A22362. I have the following questions:
1) Can the hspice model that provided on the website be imported into the Cadence PSPICE simulator? I was not able to do that but would like to ask if I missed something. What software should I use for hspice model?
2) Since I cannot import the hspice model into the Cadence PSPICE, I'm building the PSPICE model on my own. I'm having some trouble understanding the Capacitance measurement on the datasheet Figure 16. Between which two nodes are the capacitance measured? Is this capacitance between node NC/NO/IN to the node IN? I'm interested in the On and Off capacitance between COM and NO, should I just add 70pF and 370pF to get that number?
Thank you for your help in advance.
All the best,
1. A Hspice File has to be run using HSpice simulator, and I think it is made by the company Synopsys.
2. C_NC(off) and C_NO(off) are measures of the capacitance to ground at the NC/NO pins respectively which means that at these pins there is a 70pF capacitor to ground, when the switch is open for that pin. C_COM(on) is the total parasitic capacitance to ground for the entire channel. This means that it is the total parasitic capacitance to ground from the NC/NO + the channel capacitance + the Off Capacitance of the COM port, which for this part is 370pF. The Channel Capacitance is very small and generally speaking the ON capacitance ~ NC/NO Off Capacitance + COM Off Capacitance.
Below I have attached a simplified figure showing where the parasitic capacitors are. If there is anything else I could assist on please let me know!
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In reply to Parker Dodson:
The Picture didn't seem to attach in my last post.
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