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Part Number: SN74TVC3306
Customer needs to achieve any conversion from A port 3.3V to B port 1.6V-5.5V. Can they be connected in this way? As shown in the figure, can vref maintain 3.3V with a terminal? Please help to share the correct connection directly.
To understand correctly, what is the voltage level you want to achieve on the B side? Is is anywhere between 1.6V-5.5V or you want it clamped to a specific voltage?
Your application looks similar to the example shown in the Selecting the Right Level Translation Solution (Rev. A)
You will set the VREF equal to the I/O voltage level of the CPU - see more details in Table 3 "Possible Voltage-Translation Combinations Using a TVC Device" of the referenced document.
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In reply to Saminah C:
The customer does not want vdpu vref vdpu cross-change, the maximum voltage of terminal io needs 5.5V.
In the screen you shared: When VBIAS is connected through a 200-kΩ resistor to a 3-V to 5.5-V VCC supply and VREF is set to 0 V to VCC – 0.6 V, the output of each switch has a maximum clamp voltage equal to VREF.
The customer's understanding is that 3-5.5V can be connected through a 200k resistor. Is it correct?
Terminal a: 3.3VTerminal b: 1.62 1.8 3.0 3.3 5.0 5.5 Vvddref needs a fixed voltage or changes synchronously with vdpuBecause the B terminal is provided by an external voltage source, make the degree of freedom as large as possible
The customer chose lsf0108 to use it as before, but Ron is larger. He wanted to choose a small one, and also considered txs txb, but its anti-interference ability is weak. May I know Is there any other suitable chip recommendation?
In reply to Annie Liu:
Customers understanding is correct.
There’s a very detailed video series that explains all of this located here (also includes details on down-translating):
The video series specifies the LSF family of translators, but they work exactly the same as this device.
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