SN74TVC3306: I2C level translation to very low voltage

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Replies: 4

Views: 57

Part Number: SN74TVC3306

Hello !

I am using the SN74TVC3306 dual-votlage clamp to interface an I2C master at 1.8 V, to an I2C slave powered down to 0.5 V. It is working correctly down to 0.7 V (on the slave side), but my slave seems to be unable to pull-down the SDA signal when the power supply is lower than 0.7 V. There is only one master and one slave on the I2C bus.

My question is :

- can I use the SN74TVC3306 down to 0.5 V voltage supply on the slave side ? If not, is there any solution in integrated or discrete form ?

Best regards,

Philippe Sauvain
R&D Engineer
SG R&D Ltd

4 Replies

  • Philippe,

    Is the 0.5V supply on your slave side the Vref point you're look to set your voltage translator to as the 'voltage limiting point'?
    Could you show a block diagram or schematic of your setup?

    Rami

  • In reply to Rami Mooti1:

    Hello,

    You find below the schematics of the level shifter in my application. The signal ENA_GG was intended to switch off the level shifter, but is currently not used.

    My slave device is connected to the signals XCL_T and XDA_T (specific names for SCL and SDA). On the slave side, the VREF clamping voltage is set to the same voltage as my DUT.

    Any suggestions ?

    BR,

    Philippe

  • In reply to Philippe SAUVAIN:

    Philippe,

    Your set up looks fine. Nothing egregious is sticking out to me. Could you try shifting Vref @ Vdd down to 0.4 or 0.3 and see what happens to the clamping voltage?
    Have you also probed the voltages to ensure they're stable at 3.0V/0.5V at the chips inputs. Seeing as how you're 0.1V off, I wonder if the source itself is just a bit off by the time it reaches the supply path for the 3306.

    Rami

  • In reply to Rami Mooti1:

    Hello Rami, Sorry for our peaceful dialogue, that's because I hade only a few time per day to look at this problem ...

    I looked at the clamping voltage and both voltages, they look fine and stable, with minimal votlage offsets down to 0.1 V.

    It just made an experiment by replacing the IC with a variable pulldown resistor, and varying it until I got half the Vref/VDD clamping voltage on the XDA_T line; that experiment shows me that the pullup madfe by the SN74TVC3306 is strong, on the order of 100 ohms.

    As my slave device is a custom low power IC, with integrated 1k pullups and relatively weak pulldown transistor, the XDA line cannot be pulled down and I only see the zero bits as steps just a few millivotls below the power  supply votlage; this effect become worse when the power supply is lower, the internal pulldown transistor becomes weaker.

    Am I wrong when I deduce that the SN74TVC3306 shows a strong pullup behavior ?

    BR,

    Philippe