Hi team,
My customer is using the IBIS model for the bus switch "sn74cb3q3257" in the HyperLynx program to simulate the signal integrity of our PCB Layout and for some reason I cannot configure the model as an output. It only can be configured as an input which does not reflect the configuration we have on the board.
The model_type of the model name "CB3Q3257_IO" & "CB3Q3257_IO_A" is "Terminator".
How to use this IBIS model to do the simulation in HyperLynx with such topology?
Thanks