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TS5MP645: MIPI Mux with bigger package - that can be routed with more than 3 mil trace width/spacing

Intellectual 725 points

Replies: 4

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Part Number: TS5MP645

Hi,

Have used 11 numbers of TS5MP645  MIPI muxes  (for 12 camera interfaces) in our design. Unfortunately most of the PCB fabricators  we contacted are unable to fabricate it due to 2.36mil trace width and 2.36 mil trace spacing requirement. One fabricator who is ready to do it quoted very high.  

Can you suggest a  MIPI mux part that can be routed in layout with at least 3 mil trace width/spacing. We are using one clock line and 2 data lines only. 

Need low  Ron (mux resistance) , similar to TS5MP645  since camera will see 4 muxes in series  before signal hits MIPI receiver.

Thanks in advance for the support.

Regards,

Anil

  • Hi Anil,

    So we only have 2 MIPI switches and they are both in the small packages. However, if you take a look at the TS5MP646 EVM, which is our other MIPI switch that would work in this application, we have all the trace routing limited to => 3mils. Please see picture below for reference:

    For this board I'd highly suggest using four layers as it does make the routing much easier to keep above the 3mil standard that you are seeking. That is also the same standard we stuck too when developing this EVM.  If I am misunderstanding your question please let me know.

    the 645 is the same package as the 646 so either one should work fine! We don't have many alternatives that will suit your needs. However I will note that boards with these types of parts are definitely pricier than more simple muxes because of either tight spacing or using multiple layers and more complicated via routing - for example we do stacked vias in this board to create more complex routing so these parts tend to be a little more expensive to integrate into the system. But these MIPI switches are great parts that should be able to still meet your needs.

    If there are other reasons you cannot increase the spacing between trace widths or have any questions/concerns/comments please let me know and I will see what I can do!

    Best,

    Parker Dodson

  • In reply to Parker Dodson:

    Hi Parker Dodson,

    Thanks a lot for your detailed reply.

    Ours is a 10 layer board.  We had looked at  EVM  routing. Felt Differential pair routing is missing in EVM board layout and might cause issues at high speed. Also, we  wanted to avoid going  for blind and buried via.  to reduce cost. 

    Since  we are using only 2 data lines, we routed only in top layer without blind and buried via as below with 2.36 mil spacing.  Agree with you that TI Mipi mux part  that we have selected is the best in the industry having least mux ON resistance. 

    As you suggested , will look at  3mil routing with  blind and buried via and get fabrication cost.

    Do you think differential pair routing  is not necessary for these signal pairs ?

    Thanks & Regards,

    Anil

  • In reply to Anil Sudhakaran:

    Hi Anil,

    Yes you are correct the EVM does not implement differential pair routing and it is primarily a DC test board. I would suggest to keep using differential signal pairs to route the board for the signal lines. At MIPI frequencies your wavelength is going to be ~300mm - 3.75m so near the high speed end you definitely could start seeing transmission line effects for smaller systems at the higher frequencies.

    It looks like there is possibly room for just adding a via through the board, with a connection to the correct signal line within the board. This may be the cheapest route to go and a cost saving measure that I have used in the past. The primary benefit of buried/blind vias is to save space, and if you have some extra space through the board it would cheaper to get it manufactured that way.  The other two options you have I think will be pretty expensive but I think even the blind/buried via approach may be a bit cheaper.

    If there is anything else I can do to help you out please let me know!

    Best,

    Parker Dodson

  • In reply to Parker Dodson:

    Hi Parker Dodson,

    As you suggested , changed to blind/buried via and routed with  3 mil in internal layers - L1 and L3 as shown below.

    Waiting for a quotation for this from Fabricator. This looks to be a better  option than previously tried 2.36 mil without blind/buried via since 3 mil blind/buried via there are a few  more fabricators who can fabricate.

    Btw, is there a plan for a bigger package of MIPI mux from TI ?

    Thanks a lot for your support.

    Regards,

    Anil

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