SN74CBT3125: Customer needs more specification about this device

Hi Paul,

Since this is an older device - we don't have all the specifications for it - as this particular device had its last datasheet update in 2002. 

That being said:

1. I am currently waiting back to see if we have any information on the ESD specification for this part. However it is an older device and I couldn't find any of this information - so I don't know if we have anything other than what's been posted. I should have confirmation if we have data or not for this within 24-48 hours. 

2. Signal rise time can mean a few things with a mux:

a. Enable time: This is a measurement of how fast the device enables. We measure this value to be the time it takes from the control signal reaching 50% to the output signal reaching 50% of its expected value. Below is this measure in the datasheet:

If the load capacitance is higher than the enable time will increase while a lower load capacitance will help decrease this value.

b. Signal rise time can also mean when the switch is closed how long does it take for the input to match output. This isn't directly spec'd but can be approximated.  The closed mux switch has a eq. circuit of a RC low pass filter with the resistance being the on resistance of the multiplexer and the capacitance being the on capacitance. The rise time on the output is going to depend on the loading conditions of the multiplexer. See the below diagram for an explanation:

Depending on the configuration of the load impedance and its value will determine how it will load the output capacitance of the mux. As a quick example. If there is no load impedance the signal rise time for a closed switch is ~ (5 * R_on * C_On) - but if the load impedance is there it can affect the time it takes to charge the output.

If I am not answering what you are looking for - could you please elaborate a bit more on what you are looking for when you say "signal rise time".

3. We don't typically spec jitter on analog mulitplexers. This is because analog multiplexers typically don't add much jitter to the system as when the switch is closed it essentially acts as RC circuit. It will add propagation delay to the system and there will be a difference in prop delays for different inputs so there is a skew that could happen if all four outputs are supposed to be synced.

What clock frequency are you passing through the device - or are you concerned that the inputs will not be aligned with each out at the outputs? 

So please let me know if I am understanding the signal rise time request correctly for #2 and if you could possibly share more details on the application such as frequency or what the concern is with jitter an the mux so I can try to help answer any remaining questions. In the mean time I hope to get confirmation on the ESD specifications - but if you could tell me exactly what the customer is looking for I can look into this a bit more to hopefully be able to clarify any possible issues. 

Best,

Parker Dodson

Hi Paul,

We do not have the specifications for the ESD on this device.

Have you been able to look into any of the follow-up questions? 

Please let me know so I can help with any lingering questions.

Best,

Parker Dodson

Hi Paul,

I am pinging this thread once more to see if we can further assist you on this issue.

Please let me know if you are still having issues!

Best,

Parker Dodson