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CD4066B-Q1: What is the status of input pin when VDD = 0V ?

ChristianVieri
Prodigy 10 points
Part Number: CD4066B-Q1

Hi, 

What is the status of SIG_A_OUT when VDD is 0V, CONTROL_A is 0V and a signal is applied to SIG_A_IN?

The signal applied to SIG_A_IN is equivalent to a 2V voltage source with an output impedance of 100kOhm.

Can this damage the IC?

Thanks,

  • 0
    TI__Mastermind 45350 points

    Christian,

    Placing 2V on SIG_A_IN with VDD = 0V violates the absolute maximum ratings in the datasheet. 

    The 2V on the SIG_A_IN will bias the internal protection diode and you will see leakage current to Vdd.  This current could also backpower the gate of the FETs and turn on the device.

    What are you connecting to either side of the switch and why does the switch need to be off with a signal still present? 

    Here are some devices that will be Hi-Z when Vdd = 0V because they have the powered off protection. 

    Thank you,

    Adam