Hi all,
I have a question regarding format of .cinit section. I am using C6000 v7.4.8 for a C6748 single core DSP.
The format of the .cinit section in TI-COFF format is specified in TMS320C6000 Optimization Compiler v7.3 section 7.8.5. It consists of a list of cinit records. Further more the following is mentioned:
When you use the --rom_model or --ram_model option, the linker combines the .cinit sections from all the C modules and appends a null word to the end of the composite .cinit section. This terminating record appears as a record with a size field of 0 and marks the end of the initialization tables.
However, if I link with --rom_model I can observe the following:
- each cinit record is followed by a zero word
- each cinit record seems to be aligned to a 4 byte address
Note that I am initializing all global variables by myself during startup - therefore I need to parse the .cinit section correctly.
In other words, what is the reason for the holes in .cinit section as observed in the map file:
.cinit 0 00832000 0000141a
00832000 00000d2c One.obj (.cinit)
00832d2c 00000004 --HOLE-- [fill = 00000000]
00832d30 0000010a Two.obj (.cinit)
00832e3a 00000006 --HOLE-- [fill = 00000000]
00832e40 0000008a Three.obj (.cinit)
00832eca 00000006 --HOLE-- [fill = 00000000]
00832ed0 0000007c Four.obj (.cinit)
00832f4c 00000004 --HOLE-- [fill = 00000000]
00832f50 0000007c Five.obj (.cinit)
My compiler options: -k -q -O2 -mv6740 -c
My linker options: -z -q -m"$(PROJECT).map" -x -l"$(CC_BASE)\lib\rts6740.lib"
Thanks in advance
Marc
