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  • TI Thinks Resolved

AM4372: XDS560v2 TMDSEMU560V2STM-U Probe pinout?

Expert 1670 points

Replies: 6

Views: 640

Part Number: AM4372

None of the documents seem to actually detail what's on that MIPI HSPT 60-pin connector, OR what the TI or ARM 20-pin connector adapters have on them. To actually use that debugger on my design I kind of need to know what signals are used with my MPU!

As a best guess, I should reach for the TI wiki  for ARM 20-Pin Cortex Debug + ETM? Or I should use the Compact TI 20-Pin (cTI)? For what it's worth, I'll probably use a card-edge feature for JTAG instead of an actual on-board JTAG header so the physical connector doesn't matter that much as long as I get best feature support.

Does AM4372 actually support system and core trace?

TI wiki here:  http://processors.wiki.ti.com/index.php/JTAG_Connectors#TI_20-pin_Header_Information

New version of the wiki is apparently here:

http://dev.ti.com/tirex/#/?link=Development%20Tools%2FDebug%20Probes%2FXDS%2FDocuments%2FJTAG%20Connectors

  • I think I got it. "Types of JTAG headers per device family" table in the wiki points towards the full MIPI60 connector for AM4x family. AM4372 datasheet specifies EMU0 through EMU11 pins so neither 20-pin connector really does cut it.

    SPRU655i gives you the pinout and connector family, you probably want Samtec QSH-030-01-F-D-A. Now I'm not going to put £4.2 connector to a production board so either I'll do it as a separate adapter board like the provided ti20 etc adapters or put it in as an assembly option.
  • Guru 144240 points

    In reply to Olli Mannisto:

    Olli,

    You are on the right track; the MIPI-60 connector is designed to support both System and Core Pin Trace - the latter must be used with the XDS Pro Trace (TMDSEMUPROTRACE).

    What is usually done is populate the MIPI-60 during the development cycle and leave the pads on production boards.

    One detail, though: the cTI 20-pin only supports System Pin Trace and is a subset of the MIPI-60.

    Our master reference for JTAG design is the document below:

    dev.ti.com/.../

    Hope this helps,
    Rafael

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  • In reply to desouza:

    I was thinking of the not-populated angle, it's just not really a connector you can hand-assemble on a production board as needed. SPRU655i suggests it's not a good idea to put regular 20-pin JTAG in parallel with the MIPI60 due to the high clocks involved unless you use the buffering circuit outlined. 

    If I understood you correctly, TMDSEMU560V2STM-U does not benefit from the MIPI60, it only needs the 20-pin JTAG connector? EMU5 through EMU11 on the MPU are not used at all? I'm not sure how useful the system pin trace is if you are trying to e.g. profile or backtrace your code. It seems to me it's useful for analyzing power use mainly?

    So basically XDS560v2 System Trace = No ETM, ETB buffer trace only? For code profiling and tracing it doesn't actually add capability over the XDS200 as both are limited to the same instruction trace capability via the ETB on-chip buffer? 

    In capability the TMDSEMUPROTRACE appears to match e.g. Segger J-trace pro cortex probe with the difference that the latter pushes the realtime trace data over USB3 so it's buffered on your computer, not on the probe. J-trace can apparently do full instruction trace with the 20-pin (19 pin) connector? Could that Segger probe actually be used to do the full instruction trace on AM4372 or it's limited to the same 64kB ETB buffer as XDS200 and XDS560v2 System Trace?

    shop.segger.com/.../8.20.00.htm

    ..

    Can you actually flash the AM4372 via JTAG? I got the idea from the documentation that you're supposed to flash the firmware via USB stick among many other boot options including ethernet? If I've got QSPI or parallel NOR flash, can that be programmed over the JTAG or I need to use the boot option route?

  • Guru 144240 points

    In reply to Olli Mannisto:

    Olli,

    Olli Mannisto
    If I understood you correctly, TMDSEMU560V2STM-U does not benefit from the MIPI60, it only needs the 20-pin JTAG connector? EMU5 through EMU11 on the MPU are not used at all?

    You are correct on both accounts. 

    Olli Mannisto
    I'm not sure how useful the system pin trace is if you are trying to e.g. profile or backtrace your code. It seems to me it's useful for analyzing power use mainly?

    System Trace does not measure power. An overview of its capabilities can be seen in the following references:

    http://processors.wiki.ti.com/index.php/XDS560v2_System_Trace  

    https://youtu.be/G3noymHTvGI?t=5m46s 

    Olli Mannisto
    So basically XDS560v2 System Trace = No ETM, ETB buffer trace only? For code profiling and tracing it doesn't actually add capability over the XDS200 as both are limited to the same instruction trace capability via the ETB on-chip buffer? 

    Yes in both accounts. The XDS560v2 STM Debug Probe performs Core Trace only via the ETB. 

    Olli Mannisto
    In capability the TMDSEMUPROTRACE appears to match e.g. Segger J-trace pro cortex probe with the difference that the latter pushes the realtime trace data over USB3 so it's buffered on your computer, not on the probe. J-trace can apparently do full instruction trace with the 20-pin (19 pin) connector?

    Yes on both accounts. However, keep in mind that, anything further away from the device can have limitations in bandwidth and blind time (or data capture gaps). In other words, the closer the buffer is to the device, the higher the chance is to have a continuous data stream with no gaps. Obviously this is entirely related to the size of the buffer (the TMDSEMUPROTRACE has up to 2GB of compressed data, which can capture several seconds of execution in one shot). i don't know the Segger product in detail, therefore I would perhaps try it and see how large of a buffer you can acquire without having to stop and transfer the data from the probe to the host. 

    Olli Mannisto
    Could that Segger probe actually be used to do the full instruction trace on AM4372 or it's limited to the same 64kB ETB buffer as XDS200 and XDS560v2 System Trace?

    The ETB size is independent on the Debug Probe used. Basically any JTAG Debug Probe can capture ETB data if it is properly supported - the operative word being supported. I suggest you to contact Segger to evaluate how well Segger's Jlink Trace supports the AM437x device.

    Olli Mannisto
    Can you actually flash the AM4372 via JTAG? I got the idea from the documentation that you're supposed to flash the firmware via USB stick among many other boot options including ethernet? If I've got QSPI or parallel NOR flash, can that be programmed over the JTAG or I need to use the boot option route?

     

    JTAG takes complete control over the device but does not configure a device's peripheral to communicate with an external memory IC - in other words, the only devices that we perform direct Flash programming via JTAG are the ones that have built-in Flash memory (TM4C, F28x, MSP430, MSP432, etc.).

    That being said, you can always write an application that properly configures the peripheral port (either EMIF, QSPI, etc.) and the external flash device. This application is loaded via JTAG (CCS) and runs on one of the AM437x cores. This application can also use the Console I/O (standard C file operations) to allow you to choose a specific binary file from the filesystem of your host PC. 

    More recently, Uniflash is also capable of doing that. 

    http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/Board_EVM_Abstration.html#uniflash 

    Hope this helps,

    Rafael


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  • In reply to desouza:

    desouza

    System Trace does not measure power. An overview of its capabilities can be seen in the following references:

    http://processors.wiki.ti.com/index.php/XDS560v2_System_Trace  

    https://youtu.be/G3noymHTvGI?t=5m46s 

    I'm still not sure how that would be useful for debugging our application. It seems a bit of "nice to know" kind of information, is there a specific use case you could think of? I can see why core trace would be very useful for debugging. The only snag is that it might be hard to justify spending 3 grand on it. Perhaps if it can be baked into RTOS license fee expense..

    desouza

    The ETB size is independent on the Debug Probe used. Basically any JTAG Debug Probe can capture ETB data if it is properly supported - the operative word being supported. I suggest you to contact Segger to evaluate how well Segger's Jlink Trace supports the AM437x device.

    ETB support isn't really the big deal here as I could just get your low cost XDS200 probe to use it. I'm not sure how the core trace would pan out since they only have 5-pin EMU interface available. (clk + 4x data). I'll find out but definitely they don't have this particular processor as supported.
    desouza
    That being said, you can always write an application that properly configures the peripheral port (either EMIF, QSPI, etc.) and the external flash device. This application is loaded via JTAG (CCS) and runs on one of the AM437x cores. This application can also use the Console I/O (standard C file operations) to allow you to choose a specific binary file from the filesystem of your host PC. 

    More recently, Uniflash is also capable of doing that. 

    http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/Board_EVM_Abstration.html#uniflash 

    Well that's neat, no need to copy firmware to usb stick to update the debug environment. Is it actually integrated to the CCS so you can do the update from inside the IDE? Or that'd need writing the application you described?

  • Guru 144240 points

    In reply to Olli Mannisto:

    Hi,

    Olli Mannisto
    I'm still not sure how that would be useful for debugging our application. It seems a bit of "nice to know" kind of information, is there a specific use case you could think of?

    The System Trace is quite useful to optimize latencies in code that may prevent full data throughput to external memory - for example, if your system is experiencing missing blocks or frames on a video stream, you can always check if there are any snags on data transfers in and out of the device. 

    One detail: I forgot that System Trace can track power domain status of subcores on a device. This was useful in OMAP processors that required tight control over the power consumption of its many subcores. 

    Olli Mannisto
    ETB support isn't really the big deal here as I could just get your low cost XDS200 probe to use it. I'm not sure how the core trace would pan out since they only have 5-pin EMU interface available. (clk + 4x data). I'll find out but definitely they don't have this particular processor as supported.

    Core pin Trace can only use a minimum of 10 EMU pins. EMU0~4 are only used for System pin Trace when associated with the XDS560v2 STM Debug Probe you have. 

    Olli Mannisto
    Is it actually integrated to the CCS so you can do the update from inside the IDE? Or that'd need writing the application you described?

    Uniflash is capable of performing this function. CCS would require a custom application to write th an external flash IC. 

    Regards,

    Rafael


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