CCS/CC3220: I get error -2063 when trying to connect debugger with CC3220

Jan,

The errors are very similar in nature (faulty hardware) and the second error can be found at the following reference:
software-dl.ti.com/.../ccsv7_debugging_jtag_connectivity_issues.html

The first error is quite rare and can either be related to faulty code pre-loaded to the target or the device is being continuously reset by other external factors. Unfortunately from the pure JTAG/SWD standpoint there is not much more visibility on what may be happening with the device.

Does the "Test Connection" diagnostics work fine? I suspect so but I just need to be sure.

Also, how are you connecting your Debug Probe to your board? Are you using a Launchpad with flying wires or a full standalone solution such as the TMDSEMU110-U? A photograph would help. 

In this case, I will notify some device experts that may have additional comments on this device migration.

Regards,
Rafael

Hi!

Thanks for the replies. For the latter I refer to the thread I have already been posting to on the WiFi-forum. "Issues with the XDS debugger on CC3220". As you can see here we have followed the migration and also set the device in development mode through Uniflash 4.x. However, the error message still remains when trying to connect the XDS110 on a CC3220 LP to our custom board through a 2-wire jtag. As I understand, what happens initially is that when resetting the device the bootloader sets the pins according to the values of the SOP lines and stores the values in a register. These values are then used by the TAP to set it in the correct mode (ie. 2-wire/4-wire jtag etc.). Thus, when investigating the timing on the reset line and the values of the SOP we can't see any differences compared to what we observe with the CC3220SF device on the LP and that is working fine. Since the bootloader is stored in ROM, I can't understand what else could be wrong in our setup.  Any further suggestions of what to investigate?

Best regards,

Jan

Hi Jan,

Thanks for sharing your other thread. I think at this point, we should do a schematic review, preferably along with a picture or diagram of your current debug setup. Please fill in the relevant tabs of the Hardware Design checklist for faster review.

If necessary, you can send me a private message with this information.

Best regards,
Sarah

Hi!

That would be great. Where do I find the checklist and how can I send you a private message?

Best regards,

Jan

Hi Jan,

The link for the Hardware Design Checklist is in my first post (SWRU462) on this thread. If you click on my username, you should see a Connect+ button.

Best regards,
Sarah