Compiler/TM4C129XNCZAD: Compiler generating misaligned data leading to fault ISR

Prodigy 190 points

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Part Number: TM4C129XNCZAD

Tool/software: TI C/C++ Compiler

Target TM4C192XNCZAD
CCS 8.2.0.00007
Compiler Version v18.1.5.LTS

Exactly as the title says - a debug build of the TIVAC USB library is mis-aligning data and generating FaultISR when accessing data.
The problem can be fixed one at a time using a #pragma DATA_ALIGN (... , ... ), but the alignment issue just pops up somewhere else.

By inspection I can see that (so far) all the faulting instruction are a half word load in pre-indexed addressing mode, where R1 is an odd address.

    eg    LDRH    R0, [R0, #4]
    
Is there a compiler switch or CCS setting to force all variables to a particular alignment? Or can I turn off alignment faults in the CPU?

Not had this before with the TivaC libraries,

Very strange!



    

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