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Compiler/TM4C123GH6PM: Issue with passing a two-dimensional array to a pointer to array and reading its values in a comparison statement.

Part Number: TM4C123GH6PM

Tool/software: TI C/C++ Compiler

It's an issue in the assembly code generated by the compiler for ARM TM4C123GH6PM in some cases. I already tried some versions of the TI compiler, and figured out that all are buggy.

Try to do these steps below :-
1) Define a 2D array.
2) Define a pointer to array with a variable number of columns.
3) Read any value in the array using the pointer in a comparison statement (if statement).


   const int32_t ai32Arr2D[5][5] =
    {
      { 1, 1, 1, 1, 1 },
      { 1, 1, 1, 1, 1 },
      { 1, 1, 1, 1, 1 },
      { 1, 1, 1, 1, 1 },
      { 1, 1, 1, 1, 1 },
    };

    int32_t i32ColNum = 5;
    const int32_t (*pai32Arr2D)[i32ColNum] = ai32Arr2D;

/************************/* This will fail */**************************/

    if (pai32Arr2D[2][1] == 1) 
    {
        DEBUG_PRINT("Correct %u", pai32Arr2D[2][1]);
    }
    else
    {
        DEBUG_PRINT("Not correct %u", pai32Arr2D[2][1]);
    }

/************************/* This will succeed */**************************/

    int32_t i32Temp = pai32Arr2D[2][1];

    if (i32Temp == 1)
    {
        DEBUG_PRINT("Correct %u", pai32Arr2D[2][1]);
    }
    else
    {
        DEBUG_PRINT("Not correct %u", pai32Arr2D[2][1]);
    }

The assembly code :-  

323 const int32_t (*pai32Arr2D)[i32ColNum] = ai32Arr2D;
0000077e: 981A ldr r0, [sp, #0x68]
00000780: 9019 str r0, [sp, #0x64]
00000782: F8CDD06C str.w sp, [sp, #0x6c]
325 int32_t i32Temp = pai32Arr2D[2][1];
00000786: 9919 ldr r1, [sp, #0x64]
00000788: 981B ldr r0, [sp, #0x6c]
0000078a: EB0000C1 add.w r0, r0, r1, lsl #3
0000078e: 6840 ldr r0, [r0, #4]
00000790: 901C str r0, [sp, #0x70]
327 if (pai32Arr2D[2][1] == 1)
00000792: 9819 ldr r0, [sp, #0x64]
00000794: 9A19 ldr r2, [sp, #0x64]
00000796: 991B ldr r1, [sp, #0x6c]
00000798: 0040 lsls r0, r0, #1
0000079a: 4350 muls r0, r2, r0
0000079c: EB010180 add.w r1, r1, r0, lsl #2
000007a0: 6848 ldr r0, [r1, #4]
000007a2: 2801 cmp r0, #1
000007a4: D108 bne $C$L42

  • Unfortunately, I am unable to generate that same assembly output.  For the source file with the problem pointer, please follow the directions in the article How to Submit a Compiler Test Case.

    Thanks and regards,

    -George

  • Failed Case :-

    CCS Version: 9.0.1.00004

    TI ARM Compiler Version: 18.12.1

    4540.main.pp.txt

    8540.BuildLog.txt
    **** Build of configuration Debug for project TestCase_PointerToArray ****
    
    "C:\\ti\\ccs901\\ccs\\utils\\bin\\gmake" -k -j 8 all -O 
     
    Building file: "../tm4c123gh6pm_startup_ccs.c"
    Invoking: ARM Compiler
    "C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 -me --include_path="P:/Important Projects/TestCase_PointerToArray" --include_path="C:/ti/TivaWare_C_Series-2.1.4.178.TTC" --include_path="C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/include" --define=ccs="ccs" --define=PART_TM4C123GH6PM -g --gcc --preproc_with_comment --preproc_with_compile --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi  "../tm4c123gh6pm_startup_ccs.c"
    Finished building: "../tm4c123gh6pm_startup_ccs.c"
     
    Building file: "../main.c"
    Invoking: ARM Compiler
    "C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 -me --include_path="P:/Important Projects/TestCase_PointerToArray" --include_path="C:/ti/TivaWare_C_Series-2.1.4.178.TTC" --include_path="C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/include" --define=ccs="ccs" --define=PART_TM4C123GH6PM -g --gcc --preproc_with_comment --preproc_with_compile --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi  "../main.c"
    Finished building: "../main.c"
     
    Building file: "../uartstdio.c"
    Invoking: ARM Compiler
    "C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 -me --include_path="P:/Important Projects/TestCase_PointerToArray" --include_path="C:/ti/TivaWare_C_Series-2.1.4.178.TTC" --include_path="C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/include" --define=ccs="ccs" --define=PART_TM4C123GH6PM -g --gcc --preproc_with_comment --preproc_with_compile --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi  "../uartstdio.c"
    Finished building: "../uartstdio.c"
     
    Building target: "TestCase_PointerToArray.out"
    Invoking: ARM Linker
    "C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 -me --define=ccs="ccs" --define=PART_TM4C123GH6PM -g --gcc --preproc_with_comment --preproc_with_compile --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi -z -m"TestCase_PointerToArray.map" --heap_size=0 --stack_size=512 -i"C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/lib" -i"C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/include" --reread_libs --diag_wrap=off --display_error_number --warn_sections --xml_link_info="TestCase_PointerToArray_linkInfo.xml" --rom_model -o "TestCase_PointerToArray.out" "./main.obj" "./tm4c123gh6pm_startup_ccs.obj" "./uartstdio.obj" "../driverlib.lib" "../tm4c123gh6pm.cmd"  -llibc.a 
    <Linking>
    Finished building target: "TestCase_PointerToArray.out"
     
    
    **** Build Finished ****
    

  • Correct Case :-

    CCS Version: 9.0.1.00004

    TI ARM Compiler Version: 18.12.1

    2161.main.pp.txt

    6355.BuildLog.txt
    **** Build of configuration Debug for project TestCase_PointerToArray ****
    
    "C:\\ti\\ccs901\\ccs\\utils\\bin\\gmake" -k -j 8 all -O 
     
    Building file: "../tm4c123gh6pm_startup_ccs.c"
    Invoking: ARM Compiler
    "C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 -me --include_path="P:/Important Projects/TestCase_PointerToArray" --include_path="C:/ti/TivaWare_C_Series-2.1.4.178.TTC" --include_path="C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/include" --define=ccs="ccs" --define=PART_TM4C123GH6PM -g --gcc --preproc_with_comment --preproc_with_compile --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi  "../tm4c123gh6pm_startup_ccs.c"
    Finished building: "../tm4c123gh6pm_startup_ccs.c"
     
    Building file: "../main.c"
    Invoking: ARM Compiler
    "C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 -me --include_path="P:/Important Projects/TestCase_PointerToArray" --include_path="C:/ti/TivaWare_C_Series-2.1.4.178.TTC" --include_path="C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/include" --define=ccs="ccs" --define=PART_TM4C123GH6PM -g --gcc --preproc_with_comment --preproc_with_compile --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi  "../main.c"
    Finished building: "../main.c"
     
    Building file: "../uartstdio.c"
    Invoking: ARM Compiler
    "C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 -me --include_path="P:/Important Projects/TestCase_PointerToArray" --include_path="C:/ti/TivaWare_C_Series-2.1.4.178.TTC" --include_path="C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/include" --define=ccs="ccs" --define=PART_TM4C123GH6PM -g --gcc --preproc_with_comment --preproc_with_compile --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi  "../uartstdio.c"
    Finished building: "../uartstdio.c"
     
    Building target: "TestCase_PointerToArray.out"
    Invoking: ARM Linker
    "C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/bin/armcl" -mv7M4 --code_state=16 --float_support=FPv4SPD16 -me --define=ccs="ccs" --define=PART_TM4C123GH6PM -g --gcc --preproc_with_comment --preproc_with_compile --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi -z -m"TestCase_PointerToArray.map" --heap_size=0 --stack_size=512 -i"C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/lib" -i"C:/ti/ccs901/ccs/tools/compiler/ti-cgt-arm_18.12.1.LTS/include" --reread_libs --diag_wrap=off --display_error_number --warn_sections --xml_link_info="TestCase_PointerToArray_linkInfo.xml" --rom_model -o "TestCase_PointerToArray.out" "./main.obj" "./tm4c123gh6pm_startup_ccs.obj" "./uartstdio.obj" "../driverlib.lib" "../tm4c123gh6pm.cmd"  -llibc.a 
    <Linking>
    Finished building target: "TestCase_PointerToArray.out"
     
    
    **** Build Finished ****
    

  • Thank you for submitting the test cases.

    The code I generate is close to what you show in the first post.  But it does not match.  There are some differences.  Please try another experiment.

    For each build, the one that fails and the one that works, add the option --src_interlist.  This option keeps the compiler generated assembly file, and adds comments to it.  Zip those assembly files together, then attach that zip to your next post.  

    Thanks and regards,

    -George

  • Failed Case :-

    8468.Failed_Case.rar

    Workaround Case :-

    6237.Workaround_Case.rar

    In the Failed Case, I think this assembly instruction <<MULS        A1, A1, A2>> is causing the failure and generated by mistake.

    Failed Case :-
    
    ;----------------------------------------------------------------------
    ;  44 | if (pai32[1][0] == 1)                                                  
    ;----------------------------------------------------------------------
            LDR       A2, [SP, #100]        ; [DPU_V7M3_PIPE] |44| 
            LDR       A1, [SP, #100]        ; [DPU_V7M3_PIPE] |44| 
            LDR       A3, [SP, #108]        ; [DPU_V7M3_PIPE] |44| 
            MULS      A1, A1, A2            ; [DPU_V7M3_PIPE] |44| 
            LDR       A1, [A3, +A1, LSL #2] ; [DPU_V7M3_PIPE] |44| 
            CMP       A1, #1                ; [DPU_V7M3_PIPE] |44| 
            BNE       ||$C$L2||             ; [DPU_V7M3_PIPE] |44| 
            ; BRANCHCC OCCURS {||$C$L2||}    ; [] |44| 
    ;* --------------------------------------------------------------------------*
    
    Workaround Case :-
    
    ;----------------------------------------------------------------------
    ;  53 | int32_t i32Temp = pai32[1][0];                                         
    ;----------------------------------------------------------------------
            LDR       A2, [SP, #108]        ; [DPU_V7M3_PIPE] |53| 
            LDR       A1, [SP, #100]        ; [DPU_V7M3_PIPE] |53| 
            LDR       A1, [A2, +A1, LSL #2] ; [DPU_V7M3_PIPE] |53| 
            STR       A1, [SP, #112]        ; [DPU_V7M3_PIPE] |53| 
    	.dwpsn	file "../main.c",line 54,column 5,is_stmt,isa 1
    ;----------------------------------------------------------------------
    ;  54 | if (i32Temp == 1)                                                      
    ;----------------------------------------------------------------------
            LDR       A1, [SP, #112]        ; [DPU_V7M3_PIPE] |54| 
            CMP       A1, #1                ; [DPU_V7M3_PIPE] |54| 
            BNE       ||$C$L2||             ; [DPU_V7M3_PIPE] |54| 
            ; BRANCHCC OCCURS {||$C$L2||}    ; [] |54| 
    ;* --------------------------------------------------------------------------*
    
  • Thank you for sending in the compiler generated assembly files.  They showed me that I am generating the exact same code as you.  

    I filed the entry CODEGEN-6289 in the SDOWP system to have this investigated.  You are welcome to follow it with the SDOWP link below in my signature.

    Thanks and regards,

    -George

  • Thanks for your response. But I could not find this entry [CODEGEN-6289] in SDOWP. Please let me know if you need any help.

    Thanks,

    Mourad Rashwan

  • Mourad Rashwan said:
    I could not find this entry [CODEGEN-6289]

    I apologize. I just now fixed the problem. Please wait a few hours for that change to propagate through the system, then try again.

    Thanks and regards,

    -George

  • Thanks for your support.

    I found that this Incident Report [CODEGEN-6289] includes only the TI ARM Compiler [v18.12.1] to be investigated, but the latest version [v18.12.2] is defected as well, and some old versions that I've tested. Please let me know how it works.

    Thanks,

    Mourad Rashwan

  • The initial report only records the version first reported to have the problem.  Part of investigating a problem is determining which versions have it.  We investigate all versions currently active.  At this time, for the TI ARM compiler, that is versions 18.1.x.LTS and 18.12.x.LTS.

    Thanks and regards,

    -George

  • Thank you very much.

    Please let me know once the problem has been resolved, as I could not access the SDOWP system.

    Thanks

    Mourad Rashwan