Compiler/TI-CGT: Compiler bug, signed int tested as unsigned. Also linker fails without enum.

For this problem ...

Derek Loukes said:

Compiler bug: signed int register variable is assigned value from unsigned calc. Variable then tested for equals, neg and pos, but the negative code path is omitted!  Very simple test code available  in .pp file.

... please follow the directions in the article How to Submit a Compiler Test Case.

For this problem ...

Derek Loukes said:

In fact, code is so small that the linker failed until I added an arbitrary enum.  Error complaint was that c_int00 is mapped to c_int00_noargs, cannot have definition and reference in the same file (boot.obj in lib)

I'd like to reproduce this problem as well.  If this is organized as a CCS project, then please zip up the project by using the directions in the article Sharing projects, the attach that zip file to your next post.  If you do it all from the command line, then please show those commands, and put all the files referenced in those commands in zip, and attach that zip to your next post.

Thanks and regards,

-George

HI George.

Thanks for getting back to me quickly.

I have attached main.pp in a zip which demonstrates the bug in just a few lines.

This is not the actual code, but in effect, it is:

signed_int_var += unsigned_value;

if (signed_int_var < 0) {

} else {

}

where the else clause it always taken.

So I am surprised the bug hasn't surfaced earlier.

The attached preprocessed file includes comments, the build commands and the resulting assembler.

It is running on an offline PC with Windows 7 Professional Service Pack 1

Thanks in advance.

Please let me know if I can be of any assistance.

Derek

3276.main.zip

Hmmm: that Insert File above looks really weird on my screen, so just to make sure, here is the text of main.pp below:

// #include <msp430.h>
/*******************************************************************
*                                                                  *
* This file is a generic include file controlled by                *
* compiler/assembler IDE generated defines                         *
*                                                                  *
*******************************************************************/



/* ============================================================================ */
/* Copyright (c) 2020, Texas Instruments Incorporated                           */
/*  All rights reserved.                                                        */
/*                                                                              */
/*  Redistribution and use in source and binary forms, with or without          */
/*  modification, are permitted provided that the following conditions          */
/*  are met:                                                                    */
/*                                                                              */
/*  *  Redistributions of source code must retain the above copyright           */
/*     notice, this list of conditions and the following disclaimer.            */
/*                                                                              */
/*  *  Redistributions in binary form must reproduce the above copyright        */
/*     notice, this list of conditions and the following disclaimer in the      */
/*     documentation and/or other materials provided with the distribution.     */
/*                                                                              */
/*  *  Neither the name of Texas Instruments Incorporated nor the names of      */
/*     its contributors may be used to endorse or promote products derived      */
/*     from this software without specific prior written permission.            */
/*                                                                              */
/*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,       */
/*  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR      */
/*  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR            */
/*  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,       */
/*  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,         */
/*  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/*  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,    */
/*  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR     */
/*  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,              */
/*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          */
/* ============================================================================ */

/********************************************************************
*
* Standard register and bit definitions for the Texas Instruments
* MSP430 microcontroller.
*
* This file supports assembler and C development for
* MSP430x241x devices (excluding MSP430x2410).
*
* Texas Instruments, Version 1.4
*
* Rev. 1.0, Initial Version
* Rev. 1.1  added TLV in INFO Memory
* Rev. 1.2, added definitions for Interrupt Vectors xxIV
* Rev. 1.3, added missing Port7/8
* Rev. 1.4, fixed define: TAG_ADC12_1 to 0x08
*
********************************************************************/






/*----------------------------------------------------------------------------*/
/* PERIPHERAL FILE MAP                                                        */
/*----------------------------------------------------------------------------*/

/* External references resolved by a device-specific linker command file */
//#define SFR_20BIT(address)  extern volatile unsigned int address
typedef void (* __SFR_FARPTR)();



/************************************************************
* STANDARD BITS
************************************************************/


/************************************************************
* STATUS REGISTER BITS
************************************************************/


/* Low Power Modes coded with Bits 4-7 in SR */


/* ============================================================================ */
/* Copyright (c) 2013, Texas Instruments Incorporated                           */
/*  All rights reserved.                                                        */
/*                                                                              */
/*  Redistribution and use in source and binary forms, with or without          */
/*  modification, are permitted provided that the following conditions          */
/*  are met:                                                                    */
/*                                                                              */
/*  *  Redistributions of source code must retain the above copyright           */
/*     notice, this list of conditions and the following disclaimer.            */
/*                                                                              */
/*  *  Redistributions in binary form must reproduce the above copyright        */
/*     notice, this list of conditions and the following disclaimer in the      */
/*     documentation and/or other materials provided with the distribution.     */
/*                                                                              */
/*  *  Neither the name of Texas Instruments Incorporated nor the names of      */
/*     its contributors may be used to endorse or promote products derived      */
/*     from this software without specific prior written permission.            */
/*                                                                              */
/*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,       */
/*  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR      */
/*  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR            */
/*  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,       */
/*  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,         */
/*  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/*  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,    */
/*  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR     */
/*  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,              */
/*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          */
/* ============================================================================ */

/*----------------------------------------------------------------------------*/
/* INTRINSIC MAPPING FOR IAR V1.XX                                            */
/*----------------------------------------------------------------------------*/


/*****************************************************************************/
/*  INTRINSICS.H                                                             */
/*                                                                           */
/* Copyright (c) 2005 Texas Instruments Incorporated                         */
/* www.ti.com/                                                        */
/*                                                                           */
/*  Redistribution and  use in source  and binary forms, with  or without    */
/*  modification,  are permitted provided  that the  following conditions    */
/*  are met:                                                                 */
/*                                                                           */
/*     Redistributions  of source  code must  retain the  above copyright    */
/*     notice, this list of conditions and the following disclaimer.         */
/*                                                                           */
/*     Redistributions in binary form  must reproduce the above copyright    */
/*     notice, this  list of conditions  and the following  disclaimer in    */
/*     the  documentation  and/or   other  materials  provided  with  the    */
/*     distribution.                                                         */
/*                                                                           */
/*     Neither the  name of Texas Instruments Incorporated  nor the names    */
/*     of its  contributors may  be used to  endorse or  promote products    */
/*     derived  from   this  software  without   specific  prior  written    */
/*     permission.                                                           */
/*                                                                           */
/*  THIS SOFTWARE  IS PROVIDED BY THE COPYRIGHT  HOLDERS AND CONTRIBUTORS    */
/*  "AS IS"  AND ANY  EXPRESS OR IMPLIED  WARRANTIES, INCLUDING,  BUT NOT    */
/*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR    */
/*  A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT    */
/*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,    */
/*  SPECIAL,  EXEMPLARY,  OR CONSEQUENTIAL  DAMAGES  (INCLUDING, BUT  NOT    */
/*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,    */
/*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY    */
/*  THEORY OF  LIABILITY, WHETHER IN CONTRACT, STRICT  LIABILITY, OR TORT    */
/*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE    */
/*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.     */
/*                                                                           */
/*****************************************************************************/


/*---------------------------------------------------------------------------*/
/* Handle legacy conflicts                                                   */
/*---------------------------------------------------------------------------*/
/*****************************************************************************/
/*  INTRINSICS_LEGACY_UNDEFS.H                                               */
/*                                                                           */
/* Copyright (c) 2005 Texas Instruments Incorporated                         */
/* www.ti.com/                                                        */
/*                                                                           */
/*  Redistribution and  use in source  and binary forms, with  or without    */
/*  modification,  are permitted provided  that the  following conditions    */
/*  are met:                                                                 */
/*                                                                           */
/*     Redistributions  of source  code must  retain the  above copyright    */
/*     notice, this list of conditions and the following disclaimer.         */
/*                                                                           */
/*     Redistributions in binary form  must reproduce the above copyright    */
/*     notice, this  list of conditions  and the following  disclaimer in    */
/*     the  documentation  and/or   other  materials  provided  with  the    */
/*     distribution.                                                         */
/*                                                                           */
/*     Neither the  name of Texas Instruments Incorporated  nor the names    */
/*     of its  contributors may  be used to  endorse or  promote products    */
/*     derived  from   this  software  without   specific  prior  written    */
/*     permission.                                                           */
/*                                                                           */
/*  THIS SOFTWARE  IS PROVIDED BY THE COPYRIGHT  HOLDERS AND CONTRIBUTORS    */
/*  "AS IS"  AND ANY  EXPRESS OR IMPLIED  WARRANTIES, INCLUDING,  BUT NOT    */
/*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR    */
/*  A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT    */
/*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,    */
/*  SPECIAL,  EXEMPLARY,  OR CONSEQUENTIAL  DAMAGES  (INCLUDING, BUT  NOT    */
/*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,    */
/*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY    */
/*  THEORY OF  LIABILITY, WHETHER IN CONTRACT, STRICT  LIABILITY, OR TORT    */
/*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE    */
/*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.     */
/*                                                                           */
/*****************************************************************************/


/*---------------------------------------------------------------------------*/
/* Handle in430.h conflicts with legacy intrinsic names                      */
/*---------------------------------------------------------------------------*/



/*---------------------------------------------------------------------------*/
/* General MSP Intrinsics                                                    */
/*---------------------------------------------------------------------------*/
void           __no_operation(void);

unsigned short __bic_SR_register         (unsigned short mask);
unsigned short __bic_SR_register_on_exit (unsigned short mask);
unsigned short __bis_SR_register         (unsigned short mask);
unsigned short __bis_SR_register_on_exit (unsigned short mask);
unsigned short __get_SR_register         (void);
unsigned short __get_SR_register_on_exit (void);

unsigned short __get_SP_register(void);
void           __set_SP_register(unsigned short value);

void           __delay_cycles(unsigned long cycles);

unsigned int   __even_in_range(unsigned int val, unsigned int range);

void           __op_code(unsigned short op);

/*---------------------------------------------------------------------------*/
/* General MSP Macros                                                        */
/*---------------------------------------------------------------------------*/

/*---------------------------------------------------------------------------*/
/* MSP430/430X Intrinsics                                                    */
/*---------------------------------------------------------------------------*/
void             __disable_interrupt(void);
void             __enable_interrupt(void);
void             __set_interrupt_state(unsigned short state);

unsigned short   __get_R4_register(void);
void             __set_R4_register(unsigned short value);
unsigned short   __get_R5_register(void);
void             __set_R5_register(unsigned short value);

unsigned short   __bcd_add_short(unsigned short, unsigned short);
unsigned long    __bcd_add_long(unsigned long, unsigned long);

unsigned short   __swap_bytes(unsigned short a);

/*---------------------------------------------------------------------------*/
/* MSP430/430X Macros                                                        */
/*---------------------------------------------------------------------------*/



/*---------------------------------------------------------------------------*/
/* MSP430X Intrinsics                                                        */
/*---------------------------------------------------------------------------*/
void           __data16_write_addr(unsigned short, unsigned long);
unsigned long  __data16_read_addr(unsigned short);
void           __data20_write_char(unsigned long, unsigned char);
void           __data20_write_short(unsigned long, unsigned short);
void           __data20_write_long(unsigned long, unsigned long);
unsigned char  __data20_read_char(unsigned long);
unsigned short __data20_read_short(unsigned long);
unsigned long  __data20_read_long(unsigned long);


/*---------------------------------------------------------------------------*/
/* Legacy Macros                                                             */
/*---------------------------------------------------------------------------*/




/************************************************************
* PERIPHERAL FILE MAP
************************************************************/

/************************************************************
* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS
************************************************************/

extern volatile unsigned char IE1;                                /* Interrupt Enable 1 */

extern volatile unsigned char IFG1;                               /* Interrupt Flag 1 */

extern volatile unsigned char IE2;                                /* Interrupt Enable 2 */

extern volatile unsigned char IFG2;                               /* Interrupt Flag 2 */

extern volatile unsigned char UC1IE;                              /* USCI 1 Interrupt Enable */

extern volatile unsigned char UC1IFG;                             /* ISCI 1 Interrupt Flags */

/************************************************************
* ADC12
************************************************************/

extern volatile unsigned int ADC12CTL0;                         /* ADC12 Control 0 */
extern volatile unsigned int ADC12CTL1;                         /* ADC12 Control 1 */
extern volatile unsigned int ADC12IFG;                          /* ADC12 Interrupt Flag */
extern volatile unsigned int ADC12IE;                           /* ADC12 Interrupt Enable */
extern volatile unsigned int ADC12IV;                           /* ADC12 Interrupt Vector Word */

extern volatile unsigned int ADC12MEM0;                         /* ADC12 Conversion Memory 0 */
extern volatile unsigned int ADC12MEM1;                         /* ADC12 Conversion Memory 1 */
extern volatile unsigned int ADC12MEM2;                         /* ADC12 Conversion Memory 2 */
extern volatile unsigned int ADC12MEM3;                         /* ADC12 Conversion Memory 3 */
extern volatile unsigned int ADC12MEM4;                         /* ADC12 Conversion Memory 4 */
extern volatile unsigned int ADC12MEM5;                         /* ADC12 Conversion Memory 5 */
extern volatile unsigned int ADC12MEM6;                         /* ADC12 Conversion Memory 6 */
extern volatile unsigned int ADC12MEM7;                         /* ADC12 Conversion Memory 7 */
extern volatile unsigned int ADC12MEM8;                         /* ADC12 Conversion Memory 8 */
extern volatile unsigned int ADC12MEM9;                         /* ADC12 Conversion Memory 9 */
extern volatile unsigned int ADC12MEM10;                        /* ADC12 Conversion Memory 10 */
extern volatile unsigned int ADC12MEM11;                        /* ADC12 Conversion Memory 11 */
extern volatile unsigned int ADC12MEM12;                        /* ADC12 Conversion Memory 12 */
extern volatile unsigned int ADC12MEM13;                        /* ADC12 Conversion Memory 13 */
extern volatile unsigned int ADC12MEM14;                        /* ADC12 Conversion Memory 14 */
extern volatile unsigned int ADC12MEM15;                        /* ADC12 Conversion Memory 15 */

extern volatile unsigned char ADC12MCTL0;                         /* ADC12 Memory Control 0 */
extern volatile unsigned char ADC12MCTL1;                         /* ADC12 Memory Control 1 */
extern volatile unsigned char ADC12MCTL2;                         /* ADC12 Memory Control 2 */
extern volatile unsigned char ADC12MCTL3;                         /* ADC12 Memory Control 3 */
extern volatile unsigned char ADC12MCTL4;                         /* ADC12 Memory Control 4 */
extern volatile unsigned char ADC12MCTL5;                         /* ADC12 Memory Control 5 */
extern volatile unsigned char ADC12MCTL6;                         /* ADC12 Memory Control 6 */
extern volatile unsigned char ADC12MCTL7;                         /* ADC12 Memory Control 7 */
extern volatile unsigned char ADC12MCTL8;                         /* ADC12 Memory Control 8 */
extern volatile unsigned char ADC12MCTL9;                         /* ADC12 Memory Control 9 */
extern volatile unsigned char ADC12MCTL10;                        /* ADC12 Memory Control 10 */
extern volatile unsigned char ADC12MCTL11;                        /* ADC12 Memory Control 11 */
extern volatile unsigned char ADC12MCTL12;                        /* ADC12 Memory Control 12 */
extern volatile unsigned char ADC12MCTL13;                        /* ADC12 Memory Control 13 */
extern volatile unsigned char ADC12MCTL14;                        /* ADC12 Memory Control 14 */
extern volatile unsigned char ADC12MCTL15;                        /* ADC12 Memory Control 15 */

/* ADC12CTL0 */



/* ADC12CTL1 */


/* ADC12MCTLx */



/* ADC12IV Definitions */

/************************************************************
* Basic Clock Module
************************************************************/

extern volatile unsigned char DCOCTL;                             /* DCO Clock Frequency Control */
extern volatile unsigned char BCSCTL1;                            /* Basic Clock System Control 1 */
extern volatile unsigned char BCSCTL2;                            /* Basic Clock System Control 2 */
extern volatile unsigned char BCSCTL3;                            /* Basic Clock System Control 3 */












/************************************************************
* Comparator A
************************************************************/

extern volatile unsigned char CACTL1;                             /* Comparator A Control 1 */
extern volatile unsigned char CACTL2;                             /* Comparator A Control 2 */
extern volatile unsigned char CAPD;                               /* Comparator A Port Disable */





/*************************************************************
* Flash Memory
*************************************************************/

extern volatile unsigned int FCTL1;                             /* FLASH Control 1 */
extern volatile unsigned int FCTL2;                             /* FLASH Control 2 */
extern volatile unsigned int FCTL3;                             /* FLASH Control 3 */
extern volatile unsigned int FCTL4;                             /* FLASH Control 4 */







/************************************************************
* HARDWARE MULTIPLIER
************************************************************/

extern volatile unsigned int MPY;                               /* Multiply Unsigned/Operand 1 */
extern volatile unsigned int MPYS;                              /* Multiply Signed/Operand 1 */
extern volatile unsigned int MAC;                               /* Multiply Unsigned and Accumulate/Operand 1 */
extern volatile unsigned int MACS;                              /* Multiply Signed and Accumulate/Operand 1 */
extern volatile unsigned int OP2;                               /* Operand 2 */
extern volatile unsigned int RESLO;                             /* Result Low Word */
extern volatile unsigned int RESHI;                             /* Result High Word */
extern volatile unsigned int SUMEXT;                            /* Sum Extend */

/************************************************************
* DIGITAL I/O Port1/2 Pull up / Pull down Resistors
************************************************************/


extern volatile unsigned char P1IN;                               /* Port 1 Input */
extern volatile unsigned char P1OUT;                              /* Port 1 Output */
extern volatile unsigned char P1DIR;                              /* Port 1 Direction */
extern volatile unsigned char P1IFG;                              /* Port 1 Interrupt Flag */
extern volatile unsigned char P1IES;                              /* Port 1 Interrupt Edge Select */
extern volatile unsigned char P1IE;                               /* Port 1 Interrupt Enable */
extern volatile unsigned char P1SEL;                              /* Port 1 Selection */
extern volatile unsigned char P1REN;                              /* Port 1 Resistor Enable */

extern volatile unsigned char P2IN;                               /* Port 2 Input */
extern volatile unsigned char P2OUT;                              /* Port 2 Output */
extern volatile unsigned char P2DIR;                              /* Port 2 Direction */
extern volatile unsigned char P2IFG;                              /* Port 2 Interrupt Flag */
extern volatile unsigned char P2IES;                              /* Port 2 Interrupt Edge Select */
extern volatile unsigned char P2IE;                               /* Port 2 Interrupt Enable */
extern volatile unsigned char P2SEL;                              /* Port 2 Selection */
extern volatile unsigned char P2REN;                              /* Port 2 Resistor Enable */

/************************************************************
* DIGITAL I/O Port3/4 Pull up / Pull down Resistors
************************************************************/


extern volatile unsigned char P3IN;                               /* Port 3 Input */
extern volatile unsigned char P3OUT;                              /* Port 3 Output */
extern volatile unsigned char P3DIR;                              /* Port 3 Direction */
extern volatile unsigned char P3SEL;                              /* Port 3 Selection */
extern volatile unsigned char P3REN;                              /* Port 3 Resistor Enable */

extern volatile unsigned char P4IN;                               /* Port 4 Input */
extern volatile unsigned char P4OUT;                              /* Port 4 Output */
extern volatile unsigned char P4DIR;                              /* Port 4 Direction */
extern volatile unsigned char P4SEL;                              /* Port 4 Selection */
extern volatile unsigned char P4REN;                              /* Port 4 Resistor Enable */

/************************************************************
* DIGITAL I/O Port5/6 Pull up / Pull down Resistors
************************************************************/


extern volatile unsigned char P5IN;                               /* Port 5 Input */
extern volatile unsigned char P5OUT;                              /* Port 5 Output */
extern volatile unsigned char P5DIR;                              /* Port 5 Direction */
extern volatile unsigned char P5SEL;                              /* Port 5 Selection */
extern volatile unsigned char P5REN;                              /* Port 5 Resistor Enable */

extern volatile unsigned char P6IN;                               /* Port 6 Input */
extern volatile unsigned char P6OUT;                              /* Port 6 Output */
extern volatile unsigned char P6DIR;                              /* Port 6 Direction */
extern volatile unsigned char P6SEL;                              /* Port 6 Selection */
extern volatile unsigned char P6REN;                              /* Port 6 Resistor Enable */

/************************************************************
* DIGITAL I/O Port7/8 Pull up / Pull down Resistors
************************************************************/


extern volatile unsigned char P7IN;                               /* Port 7 Input */
extern volatile unsigned char P7OUT;                              /* Port 7 Output */
extern volatile unsigned char P7DIR;                              /* Port 7 Direction */
extern volatile unsigned char P7SEL;                              /* Port 7 Selection */
extern volatile unsigned char P7REN;                              /* Port 7 Resistor Enable */

extern volatile unsigned char P8IN;                               /* Port 8 Input */
extern volatile unsigned char P8OUT;                              /* Port 8 Output */
extern volatile unsigned char P8DIR;                              /* Port 8 Direction */
extern volatile unsigned char P8SEL;                              /* Port 8 Selection */
extern volatile unsigned char P8REN;                              /* Port 8 Resistor Enable */

extern volatile unsigned int PAIN;                              /* Port A Input */
extern volatile unsigned int PAOUT;                             /* Port A Output */
extern volatile unsigned int PADIR;                             /* Port A Direction */
extern volatile unsigned int PASEL;                             /* Port A Selection */
extern volatile unsigned int PAREN;                             /* Port A Resistor Enable */

/************************************************************
* Brown-Out, Supply Voltage Supervision (SVS)
************************************************************/

extern volatile unsigned char SVSCTL;                             /* SVS Control */


/************************************************************
* Timer A3
************************************************************/

extern volatile unsigned int TAIV;                              /* Timer A Interrupt Vector Word */
extern volatile unsigned int TACTL;                             /* Timer A Control */
extern volatile unsigned int TACCTL0;                           /* Timer A Capture/Compare Control 0 */
extern volatile unsigned int TACCTL1;                           /* Timer A Capture/Compare Control 1 */
extern volatile unsigned int TACCTL2;                           /* Timer A Capture/Compare Control 2 */
extern volatile unsigned int TAR;                               /* Timer A Counter Register */
extern volatile unsigned int TACCR0;                            /* Timer A Capture/Compare 0 */
extern volatile unsigned int TACCR1;                            /* Timer A Capture/Compare 1 */
extern volatile unsigned int TACCR2;                            /* Timer A Capture/Compare 2 */

/* Alternate register names */
/* Alternate register names - 5xx style */





/* TA3IV Definitions */

/* Alternate register names - 5xx style */

/************************************************************
* Timer B7
************************************************************/

extern volatile unsigned int TBIV;                              /* Timer B Interrupt Vector Word */
extern volatile unsigned int TBCTL;                             /* Timer B Control */
extern volatile unsigned int TBCCTL0;                           /* Timer B Capture/Compare Control 0 */
extern volatile unsigned int TBCCTL1;                           /* Timer B Capture/Compare Control 1 */
extern volatile unsigned int TBCCTL2;                           /* Timer B Capture/Compare Control 2 */
extern volatile unsigned int TBCCTL3;                           /* Timer B Capture/Compare Control 3 */
extern volatile unsigned int TBCCTL4;                           /* Timer B Capture/Compare Control 4 */
extern volatile unsigned int TBCCTL5;                           /* Timer B Capture/Compare Control 5 */
extern volatile unsigned int TBCCTL6;                           /* Timer B Capture/Compare Control 6 */
extern volatile unsigned int TBR;                               /* Timer B Counter Register */
extern volatile unsigned int TBCCR0;                            /* Timer B Capture/Compare 0 */
extern volatile unsigned int TBCCR1;                            /* Timer B Capture/Compare 1 */
extern volatile unsigned int TBCCR2;                            /* Timer B Capture/Compare 2 */
extern volatile unsigned int TBCCR3;                            /* Timer B Capture/Compare 3 */
extern volatile unsigned int TBCCR4;                            /* Timer B Capture/Compare 4 */
extern volatile unsigned int TBCCR5;                            /* Timer B Capture/Compare 5 */
extern volatile unsigned int TBCCR6;                            /* Timer B Capture/Compare 6 */

/* Alternate register names - 5xx style */




/* Additional Timer B Control Register bits are defined in Timer A */




/* TB7IV Definitions */

/* Alternate register names - 5xx style */

/************************************************************
* USCI
************************************************************/

extern volatile unsigned char UCA0CTL0;                           /* USCI A0 Control Register 0 */
extern volatile unsigned char UCA0CTL1;                           /* USCI A0 Control Register 1 */
extern volatile unsigned char UCA0BR0;                            /* USCI A0 Baud Rate 0 */
extern volatile unsigned char UCA0BR1;                            /* USCI A0 Baud Rate 1 */
extern volatile unsigned char UCA0MCTL;                           /* USCI A0 Modulation Control */
extern volatile unsigned char UCA0STAT;                           /* USCI A0 Status Register */
extern volatile unsigned char UCA0RXBUF;                          /* USCI A0 Receive Buffer */
extern volatile unsigned char UCA0TXBUF;                          /* USCI A0 Transmit Buffer */
extern volatile unsigned char UCA0ABCTL;                          /* USCI A0 LIN Control */
extern volatile unsigned char UCA0IRTCTL;                         /* USCI A0 IrDA Transmit Control */
extern volatile unsigned char UCA0IRRCTL;                         /* USCI A0 IrDA Receive Control */



extern volatile unsigned char UCB0CTL0;                           /* USCI B0 Control Register 0 */
extern volatile unsigned char UCB0CTL1;                           /* USCI B0 Control Register 1 */
extern volatile unsigned char UCB0BR0;                            /* USCI B0 Baud Rate 0 */
extern volatile unsigned char UCB0BR1;                            /* USCI B0 Baud Rate 1 */
extern volatile unsigned char UCB0I2CIE;                          /* USCI B0 I2C Interrupt Enable Register */
extern volatile unsigned char UCB0STAT;                           /* USCI B0 Status Register */
extern volatile unsigned char UCB0RXBUF;                          /* USCI B0 Receive Buffer */
extern volatile unsigned char UCB0TXBUF;                          /* USCI B0 Transmit Buffer */
extern volatile unsigned int UCB0I2COA;                         /* USCI B0 I2C Own Address */
extern volatile unsigned int UCB0I2CSA;                         /* USCI B0 I2C Slave Address */

extern volatile unsigned char UCA1CTL0;                           /* USCI A1 Control Register 0 */
extern volatile unsigned char UCA1CTL1;                           /* USCI A1 Control Register 1 */
extern volatile unsigned char UCA1BR0;                            /* USCI A1 Baud Rate 0 */
extern volatile unsigned char UCA1BR1;                            /* USCI A1 Baud Rate 1 */
extern volatile unsigned char UCA1MCTL;                           /* USCI A1 Modulation Control */
extern volatile unsigned char UCA1STAT;                           /* USCI A1 Status Register */
extern volatile unsigned char UCA1RXBUF;                          /* USCI A1 Receive Buffer */
extern volatile unsigned char UCA1TXBUF;                          /* USCI A1 Transmit Buffer */
extern volatile unsigned char UCA1ABCTL;                          /* USCI A1 LIN Control */
extern volatile unsigned char UCA1IRTCTL;                         /* USCI A1 IrDA Transmit Control */
extern volatile unsigned char UCA1IRRCTL;                         /* USCI A1 IrDA Receive Control */



extern volatile unsigned char UCB1CTL0;                           /* USCI B1 Control Register 0 */
extern volatile unsigned char UCB1CTL1;                           /* USCI B1 Control Register 1 */
extern volatile unsigned char UCB1BR0;                            /* USCI B1 Baud Rate 0 */
extern volatile unsigned char UCB1BR1;                            /* USCI B1 Baud Rate 1 */
extern volatile unsigned char UCB1I2CIE;                          /* USCI B1 I2C Interrupt Enable Register */
extern volatile unsigned char UCB1STAT;                           /* USCI B1 Status Register */
extern volatile unsigned char UCB1RXBUF;                          /* USCI B1 Receive Buffer */
extern volatile unsigned char UCB1TXBUF;                          /* USCI B1 Transmit Buffer */
extern volatile unsigned int UCB1I2COA;                         /* USCI B1 I2C Own Address */
extern volatile unsigned int UCB1I2CSA;                         /* USCI B1 I2C Slave Address */

// UART-Mode Bits

// SPI-Mode Bits

// I2C-Mode Bits
//#define res               (0x10)    /* reserved */

// UART-Mode Bits

// SPI-Mode Bits
//#define res               (0x20)    /* reserved */
//#define res               (0x10)    /* reserved */
//#define res               (0x08)    /* reserved */
//#define res               (0x04)    /* reserved */
//#define res               (0x02)    /* reserved */

// I2C-Mode Bits
//#define res               (0x20)    /* reserved */





//#define res               (0x80)    /* reserved */
//#define res               (0x40)    /* reserved */
//#define res               (0x20)    /* reserved */
//#define res               (0x10)    /* reserved */




//#define res               (0x80)    /* reserved */
//#define res               (0x40)    /* reserved */
//#define res               (0x02)    /* reserved */



/************************************************************
* WATCHDOG TIMER
************************************************************/

extern volatile unsigned int WDTCTL;                            /* Watchdog Timer Control */
/* The bit names have been prefixed with "WDT" */


/* WDT-interval times [1ms] coded with Bits 0-2 */
/* WDT is clocked by fSMCLK (assumed 1MHz) */
/* WDT is clocked by fACLK (assumed 32KHz) */
/* Watchdog mode -> reset after expired time */
/* WDT is clocked by fSMCLK (assumed 1MHz) */
/* WDT is clocked by fACLK (assumed 32KHz) */

/* INTERRUPT CONTROL */
/* These two bits are defined in the Special Function Registers */
/* #define WDTIE               0x01 */
/* #define WDTIFG              0x01 */

/************************************************************
* Calibration Data in Info Mem
************************************************************/

/* TLV Calibration Data Structure */

extern volatile unsigned int TLV_CHECKSUM;                      /* TLV CHECK SUM */
extern volatile unsigned char TLV_DCO_30_TAG;                     /* TLV TAG_DCO30 TAG */
extern volatile unsigned char TLV_DCO_30_LEN;                     /* TLV TAG_DCO30 LEN */
extern volatile unsigned char TLV_ADC12_1_TAG;                    /* TLV ADC12_1 TAG */
extern volatile unsigned char TLV_ADC12_1_LEN;                    /* TLV ADC12_1 LEN */




/************************************************************
* Calibration Data in Info Mem
************************************************************/


extern volatile unsigned char CALDCO_16MHZ;                       /* DCOCTL  Calibration Data for 16MHz */
extern volatile unsigned char CALBC1_16MHZ;                       /* BCSCTL1 Calibration Data for 16MHz */
extern volatile unsigned char CALDCO_12MHZ;                       /* DCOCTL  Calibration Data for 12MHz */
extern volatile unsigned char CALBC1_12MHZ;                       /* BCSCTL1 Calibration Data for 12MHz */
extern volatile unsigned char CALDCO_8MHZ;                        /* DCOCTL  Calibration Data for 8MHz */
extern volatile unsigned char CALBC1_8MHZ;                        /* BCSCTL1 Calibration Data for 8MHz */
extern volatile unsigned char CALDCO_1MHZ;                        /* DCOCTL  Calibration Data for 1MHz */
extern volatile unsigned char CALBC1_1MHZ;                        /* BCSCTL1 Calibration Data for 1MHz */


/************************************************************
* Interrupt Vectors (offset from 0xFFC0)
************************************************************/

#pragma diag_suppress 1107


/************************************************************
* End of Modules
************************************************************/







/********************************************************************************/

// Actual Bug for submission is in main() below, followed by comments,
// but first there is this other issue:

enum {
    a_secondary_question_is
} Why_is_this_enum_needed_for_linking;



int main(void)
{
    signed int error;

    error = TACCR1;

    error += (((3686400UL)/8)/(4096));        // DCO_ADJ = 112.5 which becomes 0x0070

    // BUG: For some reason, the tests on "error" below are done as unsigned int !!

    if (error) {
        if (error < 0) {    // Therefore this test is omitted
            DCOCTL--;
        } else {
            DCOCTL++;        // and this code is always executed
        }
    }
}


/********************************************************************************
  This code exhibits 2 problems:

  1.  Significant bug where a signed variable is tested as unsigned !!
      - TACCR1 and DCO_ADJ are both unsigned
      - the calculated "error" value is only used for the tests
      - "error" is a local register variable and does not need to be written to memory
      - perhaps the optimiser is effectively not writing to the variable
        and therefore retains the unsigned nature of the calculation?

      Generated assembler for main() is:

TEXT Section .text, 0x16 bytes at 0x00010000
010000:              main:
010000:              [0].text:main:
010000: 1F42             MOV.W   &TACCR1,R15
010002: 7401            
010004: 3F50             ADD.W   #0x0070,R15
010006: 7000            
010008: 0224             JEQ     (0x000e)
01000a: D253             INC.B   &DCOCTL
01000c: 5600            
01000e:              $C$L1:
01000e: 0C43             CLR.W   R12
010010: 1001             RETA    
010012:              abort:
010012:              [9].text:abort:
010012:              $C$L17:
010012: FF3F             JMP     (P5REN)

      There are 2 ways to change the source to generate the correct code:

      Problem does NOT occur if use:
            error = error + DCO_ADJ;
      - having "error" on RHS enforces a signed result
     
      Problem does NOT occur if use:
            #define DCO_ADJ    0070
      - presumably this is because it omits the UL
      - or is this because the original calculation is non-integer?


  2.  Code must have at least one enum to avoid linker error

      While trimming code to submit this bug report, I came across a secondary issue:
      - the code above needs a bogus enum, even though the enum has no use to the code
      - without any enum, the linker fails!
      
      Without any enum, the build produces:

Building main.obj
Linking XXXXX.out (XXXXX.map)
error: symbol "_c_int00" is mapped to symbol "_c_int00_noargs"; mapped symbol
   cannot have definition and reference in the same file
   ("c:\ti\ccs1010\ccs\tools\compiler\ti-cgt-msp430_20.2.1.LTS\lib\rts430x_lc_s
   d_eabi.lib<boot.c.obj>")
error: symbol "_c_int00" is mapped to symbol "_c_int00_noargs"; mapped symbol
   cannot have definition and reference in the same file
   ("c:\ti\ccs1010\ccs\tools\compiler\ti-cgt-msp430_20.2.1.LTS\lib\rts430x_lc_s
   d_eabi.lib<boot.c.obj>")
error: errors encountered during linking; "XXXXX.out" not built
>> Compilation failure




  For reference, these are the commands used to compile and link:

Building main.obj
cl430 --silicon_version=mspx --code_model=large --data_model=small --opt_level=4
 -D=__MSP430F2416__ --use_hw_mpy=16 --silicon_errata=CPU19
 -I c:/ti/ccs1010/ccs/tools/compiler/ti-cgt-msp430_20.2.1.LTS/include
 -I c:/ti/ccs1010/ccs/ccs_base/msp430/include --c11 --relaxed_ansi
 --enum_type=packed --plain_char=unsigned --auto_inline=10 --optimizer_interlist
 --gen_opt_info=2 --issue_remarks --display_error_number --verbose_diagnostics
 -pds=174 -pds=179 -pds=880 -pds=1219 --set_error_limit=10
 --pp_directory=.deps --preproc_with_compile --preproc_with_comment src/main.c

Linking XXXXX.out (XXXXX.map)
cl430 --silicon_version=mspx --code_model=large --data_model=small --opt_level=4
 --run_linker --use_hw_mpy=16 --cinit_hold_wdt=on
 -I c:/ti/ccs1010/ccs/tools/compiler/ti-cgt-msp430_20.2.1.LTS/lib
 -I c:/ti/ccs1010/ccs/ccs_base/msp430/include --rom_model --cinit_compression=off
 --stack_size=0x200 --undef_sym=_reset_vector --warn_sections
 --symbol_map=_c_int00=_c_int00_noargs
 --symbol_map=_auto_init=__TI_auto_init_nobinit_nopinit_hold_wdt main.obj
 --map_file=XXXXX.map --output_file=XXXXX.out src/lnk_MSP430F2416.cmd

From installation of Code Composer Studio Version 10.1.0.00010   (c) 2016

\********************************************************************************/

Thank you for submitting a test case.

Regarding the first problem in a  C file ... I can reproduce the problem.  I filed the issue EXTSYNC-2539 to have this investigated.  You are welcome to follow it with the link below in my signature.

Regarding the second problem with linking ... Why do you use these options?

Derek Loukes said:

 --symbol_map=_c_int00=_c_int00_noargs
 --symbol_map=_auto_init=__TI_auto_init_nobinit_nopinit_hold_wdt

If you remove them, the errors do not occur.  And I don't know why you need these options.  The linker automatically handles the mapping of these particular symbols.

Thanks and regards,

-George