We are using PROCESSOR_SDK_VISION_03_07_00_00 with CCSv7 for a custom DRA7 board. We are able to connect the A15 core and load the SPL image from JTAG. But we are not able to hit any breakpoint although we are putting the breakpoint in the init code from where we are actually getting logs.
We have followed the steps mentioned in the tutorial https://training.ti.com/linux-board-porting-series-module-7-debugging-u-boot-jtag-ccs?context=399066-696
Are we missing out on any step?