Hello Ki,
Shall I know whether this issue has been solved or not? My customer also met with the same issue:
Thanks!
Best Regards,
Linda
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Hello Ki,
Shall I know whether this issue has been solved or not? My customer also met with the same issue:
Thanks!
Best Regards,
Linda
Hi Linda,
Currently the expert working on this on vacation, who will be back next week. In the meantime we will try to find somebody who can answer this post. Somebody will respond to this by next week.
Thanks,
Nirav
Hello Linda,
There is a limited number of hardware breakpoints available on a device. The number of available breakpoints vary per device. I'm not sure exactly how many there are for the cortex m4 on the f28388d, but it appears to be just 2, based on my tests.
If you are only able to set one, then likely the debugger is using up one other breakpoint silently. You can change the debugger options to free up the other breakpoint. With the default options, I was only able to set just one also. When I disabled all the options that can use breakpoints, I can now set 2 hardware breakpoints.
For more information on these options, please see:
Thanks
ki
Hello Ki,
Thank you for your reply.
Would you please help how to set software breakpoints? Since software breakpoint number is not limited, is it right?
If yes, what about the difference of hardware breakpoint with software breakpoint? Thanks!
Best Regards,
Linda
Would you please help how to set software breakpoints? Since software breakpoint number is not limited, is it right?
There is theoretically no limit to the amount of available software breakpoints. However, you cannot set a software breakpoint in flash
If yes, what about the difference of hardware breakpoint with software breakpoint? Thanks!
Please see:
https://software-dl.ti.com/ccs/esd/documents/users_guide/ccs_debug-main.html#breakpoints
Thanks
ki
Hello Ki,
We found that many breakpoints can be set while debugging C28 codes in flash.
Are they software breakpoints or hardware breakpoints? Thanks!
Best Regards,
Linda
I believe there are up to 10 hardware breakpoints available on the F28 core of an F28388 device.
To tell the difference between hardware and software breakpoints, you can look in the Breakpoints view. In the screenshot below, you can see how the icons for each are different (note the additional horizontal and vertical lines in the hardware breakpoint vs just the circle for the software breakpoint). Also see the text that has "[H/W BP]" for hardware breakpoints and "[S/W BP]" for software breakpoints.
Thanks
ki
Hello Ki,
Thank you for your help. But why is there only 1 hardware breakpoint on M4 core of F28388S? Thanks!
Best Regards,
Linda
But why is there only 1 hardware breakpoint on M4 core of F28388S? Thanks!
Please see my previous comment:
If you are only able to set one, then likely the debugger is using up one other breakpoint silently. You can change the debugger options to free up the other breakpoint. With the default options, I was only able to set just one also. When I disabled all the options that can use breakpoints, I can now set 2 hardware breakpoints.
For more information on these options, please see:
Thanks
ki
Hello Ki,
By default many hardware breakpoints can be set on C28 core but only 1 hardware breakpoint can be set on M4 core, why is there such difference? Would you please help? Thanks!
Best Regards,
Linda
By default many hardware breakpoints can be set on C28 core but only 1 hardware breakpoint can be set on M4 core, why is there such difference? Would you please help? Thanks!
Each hardware breakpoint uses up an on-chip debug resource. There are only a finite number of them available for each CPU. The total number available can vary greatly per CPU and per device. There is a tradeoff in regards to number of available resources vs cost and physical size overhead. C28x has typically only supported 2 hardware breakpoint. But recent 28x devices like F28388 has a new ERAD module which allows for a greatly increased number of hardware breakpoints (from 2 to 10). See page 266 of https://www.ti.com/lit/ds/symlink/tms320f28388d.pdf for more details. However, this only applies to the F28x CPU of the F28388. It appears that the M4 of the F28388 only has 2. I couldn't find this stated explicitly in the datasheet but based on my testing, I can only set a maximum of 2. You may want to confirm with some 28x hardware expert to be sure.
I hope this explanation helps
ki
It appears that the M4 of the F28388 only has 2. I couldn't find this stated explicitly in the datasheet but based on my testing, I can only set a maximum of 2.
Arm Cortex-M4 Processor Technical Reference Manual Revision r0p1 indicates the FPB (Flash Patch and Breakpoint unit) is available as a full unit or as a reduced unit. Where the reduced unit only has Two instruction comparators. Therefore, suspect the tms320f28388d M4 has been configured with the reduced FPB.
The Flash Patch Control Register (FP_CTRL) described in the ARMv7-M Architecture Reference Manual has the NUM_CODE bits which report the number of instruction address comparators configured in the Cortex-M4 core.
If you read the FP_CTRL register at address 0xE0002000, using the DAP, should be able to confirm the number of breakpoints configured.
I don't have a tms320f28388d to try this.
If you read the FP_CTRL register at address 0xE0002000, using the DAP, should be able to confirm the number of breakpoints configured.
As usual, Chester is correct. When reading FP_CTRL of my F28388D, I can see that 2 are supported.
Thanks
ki