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IBIS Model for XDS560v2 Emulator

Other Parts Discussed in Thread: SN65LVDS388A

Hi,

I am working on a design which uses a C6472 DSP and I would like to simulate the connection to the emulator to verify the termination resistor values. The note in the beginning of Appendix E in the Emulation and Trace Headers document (spru655g) mentions that "TI recommends using tools that support simulating with IBIS models of the TI device and the LVDS buffer (SN65LVDS388A)". I have the IBIS model for the C6472, but I need to know what to use for modelling the emulator. I downloaded the IBIS model for SN65LVDS388A from http://www.ti.com/litv/ibs/sllc049. None of the pin names match what is listed for the TI 60-pin header. Can I assign these buffers to each pin manually in order to simulate or is there a better way?

Thanks,

Josh King

  • Hi Josh,

    I'll forward this to our emulation experts.

    ki

  • The XDS560T trace inputs have a complex input network shown in the attached file.  This shows a 1.5" 50 ohm trace which is the length on the PWB.  Add an additional 8" of transmission line to account for the 50 ohm microcoax in the cable.

     

    You can model all of the EMU inputs this way.  EMU0 and EMU1 have some circuitry attached to support cross triggering and HS-RTDX.  We generally modeled the connector as a 1 pF capacitor.  There are also ESD diodes on all of the inputs.  These are low capacitance (1 pF) and can be modeled by putting a capacitor at the start of the 1.5" transmission line shown in the attached document.  Vref is the I/O voltage of your target device.  Vthr is set by the software during calibration of the trace capture.

    Lee

    2388.input.doc

     

     

  • Hi Lee,

    Thank you for the information. Is there an existing IBIS model which encapsulates this or do I need to create one based on the model you provided in the document?

    Thanks,

    Josh

  • You will have to create one.