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Question for how to write IST

Other Parts Discussed in Thread: CCSTUDIO

Hi All

    When writing IST for TMS3206701 in ccs3.3.38.2  , I find there are  two main ways .

The first is 

  stw b0,*--b15
  mvkl _xint0_isr,b0
  mvkh _xint0_isr,b0
  b b0
  ldw *b15++,b0
  nop 3
  nop
  nop


The second is (My way)
  ......
  SP                        .set        B15      
....          

   STW         B7, *SP--[2]

||     MVKL         My_interrupt_fun, B7

        MVKH        My_interrupt_fun, B7

        B                B7

        LDW         *++SP[2], B0

   
   It is clear the main difference is the first way using  *--b15 push b0 and the second way using  *SP--[2]
push b7.I think the second way (My way)maybe destroys last pushed variable or register's value because it will push

firstly SP-- secondly. But My program work well.Could it be said that both ways are right?
Thanks for any help.

Regards,
liu George
 

 

  • liui George,

    Analyzing your own C6000 assembly code that seems to work, with the intent of determining if it will always work, is a bit more than most of us can offer for you.

    The code as written by TI has been used for many years and was written by the people who originally studied the C6000 architecture and possible collaborated with the original C6000 designers. It has been fully tested and is expected to work under all conditions we have come across.

    Your code is different just because you want it to be different. If your testing is thorough and you are happy with the results, then you of course have the right and privilege to use the code you have written.

    If you want TIs advice, please use the code examples we have provided.

    Your code example does not explicitly fill the delay slots after the B B7 instruction, so no comments can be made about the results you could get from the missing code.

    Your code example has a clear bug that would prevent it from working, in that you save B7 to the stack and restore that value into B0. This corrupts both registers.

    The more subtle aspects of C6000 assembly coding are much more difficult and require much study. There is no need to go through that effort when tested code is already available.

    Regards,
    RandyP

     

    If you need more help, please reply back. If this answers the question, please click  Verify Answer  , below.


  • Hi RandyP

       First thank for your great help coming from your profound knowledge .Then sorry for my mistake when writing code   from memory and my poor english .

      My code following in fact
      ......
      SP                        .set        B15      
    ....          

       STW         B7, *SP--[2]

    ||     MVKL         _My_interrupt_fun, B7

            MVKH        _My_interrupt_fun, B7

            B                B7

            LDW         *++SP[2], B7
      nop 2
      nop
      nop
    ;Next ISFP


        
       
      If you have installed ccs3.3.38.2 on folder C:\CCStudio_v3.3, you will find the code in C:\CCStudio_v3.3 \examples\dsk6713\csl\mcasp\mcasp1\vecs_mcasp1.asm seems as same as the first way and the code in C:\CCStudio_v3.3\bios_5_31_02\packages\ti\rtdx\examples\common\intvecs67.asm seems as same as the second way(My way). The first example is corresponding to C6713.The second  seems corresponding to C67X family. Are they  also applicable to C6701? If  applicable to ,
     then My conclusion is both right.Right?

     

    Regards,
    liu George

  • [ed - My "preference" stated here is not valid, per Archaeologist's guidelines in the later posts. -RandyP]

    liu George,

    I will request someone to move this thread to the TI C/C++ Compiler forum where a true expert can give you an opinion.

    Most likely both are considered acceptable, since we have put both in examples.

    My preference would be for a combination of the two. I prefer the pre-decrement STW in the first example because it allows for the bad assembly programming practice of saving a single word onto the empty space at SP[0] while the second example's post-decrement STW does not. However, the second example maintains the stack pointer on an 8-byte boundary while the first example does not; this could be bad if an NMI occurred after the STW and before the LDW. And the second example is 1 cycle faster because it parallels the first two instructions.

    But I am not the compiler expert, and there may be reasons for writing the code the way they have done. We will see what if any answers come from the Compiler Forum.

    Regards,
    RandyP

  • If there is any C code in the system, all C-callable functions must adhere to the C calling convention, which includes the fact that the SP must be 8-byte-aligned at all times.  Furthermore, all functions (even non-C-callable ones and interrupt handlers) must ensure SP is 8-byte-aligned at all times.  This is because compiler-generated assembly code for interrupt handlers written in C assumes the SP is 8-byte-aligned at all times.

    Thus, even when calling a function that doesn't adhere to the C calling convention, 8-byte alignment must be preserved at all times, even during function prologs and epilogs.  This means that every instruction which changes SP must do so in 8-byte increments.

    A second requirement that must be preserved at all times is that the 4-byte word pointed to by SP must be unused.  In other words, SP always points to an EMPTY 4-byte location.  The 8-byte double word pointed to by SP contains 4 bytes reserved for any functions which will be called (including interrupt handlers), and also contains 4 bytes reserved to the current function (for historical reasons).  This is tricky.

    The combination of these two requirements means every SP-modifying PUSH must be a post-decrement by a multiple of 8 bytes, and every SP-modifying POP must be a pre-increment by a multiple of 8 bytes.

    A quick look at how the compiler does it:

    int call(int x);
    int func()
    {
        return call(call(0));
    }
    
    _func:
               CALL    .S1     _call
               STW     .D2T2   B3,*SP--(8)
               MVKL    .S2     $C$RL0,B3
               MVKH    .S2     $C$RL0,B3
               ZERO    .L1     A4
               NOP             1
               CALLRET .S1     _call
               LDW     .D2T2   *++SP(8),B3
               NOP             4
    

    Now, of course, if there are no C functions whatsoever in the entire program, and there never will be, you are free to do whatever you like for a calling convention.  However, someday someone's going to add just one C function, so it might be better to always stick with the C convention.

  •  

    Thank you for your detail comments.

    By your words ,

    Archaeologist said:

    The combination of these two requirements means every SP-modifying PUSH must be a post-decrement by a multiple of 8 bytes, and every SP-modifying POP must be a pre-increment by a multiple of 8 bytes.

    I have known my way (the second way))to write interrupt service fetch packet  maybe correct  and   adhere to  the combination of these two requirements  (in fact ,all others  code in my project  writing by C ).But I still  want to know if interrupt service fetch packet  also has to  adhere to the combination of these two requirements  .  Can you give me explicit answer?

     

  • If there is any C-callable code in the system, these requirements are in force at all times, including interrupt handlers.

  • liu george,

    Based on Archaeologist's comments, my previous "preference" was incorrect. Only the "second" version which uses the post-decrement STW is correct. The "first" version is incorrect because it does not maintain the stack alignment and because it does not leave unused the word at the stack pointer.

    I will insert a comment in my previous post to make this clear.

    Regards,
    RandyP

     

    [Once you are satisfied with these answers, please mark one of Archaeologist's posts with the Verify Answer button.]

  • Hi   and  RandyP

       Thank for your help  again. Only with these help,i could make progress rapidly.

    Regards,

    George