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Issue with debugging in Multicore scenario

Hi,

 

We are facing a debugging issue in the multicore environment (ex: with 2 cores) .

Though the same code is running on both master and slave cores, the code flow behavior of  master core and slave core is not same.

It is explained with the below code snippet.

 

if(!ptrContext->inputContentType)         //Stage1
  {
      Statement1;

  }
  else
  {
     Statement2;

  }

Statement3;       //Stage2

Statement4;

 

We kept a breakpoint at the condition (at Stage1) and after hitting the breakpoint if we do StepInto (F6), though the condition is same for both the cores, one core is executing if-branch and another core is executing else-branch.

But if we keep the breakpoint after the if-else branch (at Stage2), both the cores are executing the same statement based on the condition.

 

Tested environment:

CCS Version:                      5.1.0.09000

Compiler version:            TIv7.3.1

Platform:                             TMS320C6678EVM (TMDXEVM6678L)

 

Regards

Kumar

  • Hi Kumar,

    Sorry for the delayed response. I tried to reproduce this issue on my 6678EVM but I was unsuccessful (it worked as expected). If you could provide a small, reproducible test case, that would be very helpful. Also I assume you are setting a breakpoint at stage 1 on both cores?

    Thanks

    ki