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OMAPL137-HT: Can i daisy chain the JTAG on omapl137-ht

Part Number: OMAPL137-HT
Other Parts Discussed in Thread: MSP430FR5739

Hi, 

On our board, we would be using a fpga and omapl137-ht. Is it possible to daisy-chain them together? 

I saw BSDL file is available for omapl137, so I assume the answer is yes. I am a bit worried though about any impact on debugging both cores. 

Do let me know what you guys think. 

Thanks, 

AQ

  • AQ,
    I believe this should work.
    Please reference the following resource that discusses connections.
    processors.wiki.ti.com/.../XDS_Target_Connection_Guide

    I did see other comments indicated that other devices on the chain must support bypass instruction.

    Regards,
    Wade
  • Thanks Wade, ill look into it. Does MSP430FR5739 support bypass instruction ? 

    That would be on the processor on the chain. 

    Thanks, 

    AQ

  • AQ,

    I think the CCS team may have better insight into this question.

    I will move the post to their forum.  If they cannot resolve, I will investigate further.

    Regards,

    Wade

  • CCS team, any issue with daisy chaining an OMAPL137 with MSP430 on JTAG?
    Thanks,
    Wade
  • AQ,

    Heterogeneous devices can coexist in the same scan chain, thus you can add a bypass to the IR chain provided you know the number of bits of your FPGA device. Details on how to customize your target configuration are shown at:

    processors.wiki.ti.com/.../Target_Configuration_-_Custom_Configurations

    However, specifically for MSP430 the scenario is slightly different: despite its JTAG allows bypassing the chain, the protocol used to program them does not allow having other devices in the same scan chain. In other words, you will be able to talk to the OMAPL137 and the FPGA, but not the MSP430. The scenario gets a bit more complicated if the MSP430 does not have dedicated JTAG pins.

    Hope this helps,
    Rafael
  • Thank Rafael for the reply, 

    When you say "provided you know the number of bits of your FPGA device", which number of bits are we talking about here ?

    Are we talking about the instruction to bypass the instruction register ? If yes, i do know that 0xFF does that for the fpga I am using. 

    And if I am not wrong, the omap bsdl file would help us to bypass omap during programming the fpga. Please confirm. 

    So how do i bypass the fgpa, when emulating code on OMAP. The link you provided talks about cofiguring multiple CPUs. Would an fpga be treated as a subpath CPU ? 

    Thanks, 

    AQ

  • AQ,

    Sorry, I missed your reply.

    >>When you say "provided you know the number of bits of your FPGA device", which number of bits are we talking about here ?
    >>Are we talking about the instruction to bypass the instruction register ? If yes, i do know that 0xFF does that for the fpga I am using.
    Yes, you are correct. The BSDL file would show this information for you.

    >>And if I am not wrong, the omap bsdl file would help us to bypass omap during programming the fpga. Please confirm.
    That is correct.

    >>So how do i bypass the fgpa, when emulating code on OMAP. The link you provided talks about cofiguring multiple CPUs. Would an fpga be treated as a subpath CPU ?
    No. The Bypass is a "Device" and not a subpath as indicated by Figure 15 of the page I sent before. I added some additional details about the process of adding bypass devices above this figure.

    Hope this helps,
    Rafael
  • Thanks Rafael for the reply, 

    Sorts me out for the moment where I layout my board. Would post again once I start testing. 

    You can keep the thread alive :)

    Thanks, 

    AQ